HiPEAC

Marco Santambrogio

Marco Santambrogio is an Associate Professor at Politecnico di Milano since 2018, and an Adjunct Professor del College of Engineering of the University of Illinois at Chicago (UIC) since 2009. He was Research Affiliate with the Computer Science and Artificial Intelligence Laboratory (CSAIL) at Massachusetts Institute of Technology (MIT) from 2010 to 2015. He received his laurea (M.Sc. equivalent) degree in Computer Engineering from the Politecnico di Milano (2004), a M.Sc. degree in Computer Science from the University of Illinois at Chicago (UIC) in 2005 and his PhD degree in Computer Engineering from the Politecnico di Milano (2008). Prof. Santambrogio was a postdoc fellow at CSAIL, MIT.

He has been with the Micro Architectures Laboratory at the Politecnico di Milano, where he founded the Dynamic Reconfigurability in Embedded System Design (DRESD) project in 2004. In 2011, he founded the Novel, Emerging Computing System Technologies Laboratory (NECSTLab – http://necst.it/), merging together the two previously existing labs: MicroLab and VPLab, and he is, since then, in charge of the laboratory. He conducts research and teaches in the areas of reconfigurable computing, self-aware and autonomic systems, hardware/software co-design, embedded systems, and high performance processors and systems. Since 2001, he has been involved in several research projects in collaboration with industries such as Xilinx, Maxeler, ARM, Siemens Mobile and Nokia Siemens Network. With respect to Xilinx, Marco created and hosted the first two edition of the Xilinx PYNQ Hackathon, his research group has a strong and long history of collaborations with Xilinx Dublin, because of the work done on SDAccel and the roofline model, with Xilinx Colorado, because of the work done on the PYNQ platform and with Xilinx San José because of the Coursera courses and the Amazon AWS F1 research. In 2017 his group held a SDAccel, CAOS and Amazon F1 instances workshop at the IEEE ICCD Conference in Boston.

Marco D. Santambrogio is a senior member of both the IEEE and ACM, he is member of the IEEE Computer Society (CS) and the IEEE Circuits and Systems Society (CAS). He is or has been member of different program committees of electronic design automation conferences, among which: DAC, DATE, CODES+ISSS, FPL, RAW, EUC, IFIP VLSI Conference.


Expertise areas

Application areas: Bio medicine, Digital humanities, Financial services, Healthcare, Smart city, Smart home

Topics: Computer architecture, Design Space Exploration, EDA, FPGAs, Hardware, High-performance computing, Parallel computing, Quantum computing, Resource management / Scheduling