Dimitris Gizopoulos is Professor at the Department of Informatics and Telecommunications, University of Athens where he leads the Computer Architecture Laboratory. His research focuses on the dependability, the performance and the energy of computer architectures (built around CPUs, GPUs and other accelerators) for high-performance and embedded computing. Gizopoulos has published more than 190 papers in peer reviewed transactions, journals and conference proceedings, holds patents in microprocessor error detection and is author of one book and editor of three books in dependable computing. He currently serves as Associate Editor for the IEEE Transactions on Computers (TC), IEEE Transactions on Sustainable Computing (TSUSC), IEEE Transactions on Emerging Topics in Computing (TETC), and Springer/Nature JETTA and previously he served as Associate Editor for IEEE Transactions on VLSI Systems and IEEE Design & Test of Computers Magazine. He also served as guest editor for several special issues in IEEE Transactions and Magazines and as member of the Steering, Organizing and Program Committees of several IEEE and ACM conferences. Gizopoulos is a Fellow of IEEE (class of 2013) for his contributions to microprocessor architectures error detection, a Golden Core Member of IEEE Computer Society, and a Distinguished Member of the ACM (class of 2022). He was the General Chair of MICRO 2021 and MICRO 2020 symposium editions held virtually from Athens. He is member of the HiPEAC and was Vice Chair of the ESF-funded MEDIAN COST Action. His research group activities are currently funded by national resources (the Hellenic Foundation for Research and Innovation), the EU (multiple projects funded by the Horizon Europe, H2020 and FP7 frameworks) as well as the industry (including Meta, Intel, AMD, Cisco, IBM, ABB, Bosch, iRoC).
Dimitris Gizopoulos
Expertise areas
Topics: Computer architecture, Cyber-physical systems, Dependability, Design Space Exploration, Edge computing, Embedded Systems, Energy efficiency / Low-power computing, GPUs, Hardware, High-performance computing, Neuromorphic computing, Parallel computing, RISC-V, Safety, Simulation