Alessandro Palumbo

Alessandro Palumbo is an Associate Professor at CentraleSupelèc and an Associate Researcher at University of Rennes, CNRS, IRISA, France IRISA Lab, Inria. He received a Ph.D. in Electronics Engineering in 2022 at the university of Tor Vergata for his research titled “Features Analysis of Microarchitectural Attacks and Hardware Trojans in Microprocessors: Detection & Mitigation Techniques”. He took a master’s degree in Electronics Engineering for Telecommunications and Multimedia at the same university, where he also received his bachelor’s degree in Electronics Engineering. In 2022/2023 A.Y., he was an Assistant Researcher at Politecnico di Milano. There, his research activity was titled “Design of Integrated Circuits for High-Security Primitive of In-Memory Computing”. His research focus is Hardware Security. In particular, his interests include hardware acceleration of networking functions and CPU microarchitectures, with particular emphasis on Machine Learning techniques and Probabilistic Data Structures to guarantee security and reliability in microprocessor-based systems in both FPGA and In-Memory Computing scenarios.