Announcing the winners of the 2025 HiPEAC Technology Transfer Awards

The winners

• ACE3: Democratizing large-scale AI through groundbreaking software acceleration – Xiaoyang Sun, University of Leeds, UK

• Belfort: Hardware acceleration for computing on encrypted data – Ingrid Verbauwhede, KU Leuven and Belfort, Belgium

• Accelerating early software development: A high-performance parallel hardware-simulation framework – Nils Bosbach, RWTH Aachen University, Germany

• Novel intermediate representation for efficient recursive query processing – Amir Shaikhha, University of Edinburgh, UK

• Ximplic: Simplifying computing-in-memory – Simranjeet Singh and Farhad Merchant, University of Groningen, The Netherlands

ACE3: Democratizing large-scale AI through groundbreaking software acceleration – Xiaoyang Sun, University of Leeds, UK

ACE3 is an advanced software platform that removes memory bottlenecks in hardware accelerators, enabling training of large AI models without massive supercomputing resources.

Large neural networks often hit hardware limits, as even powerful accelerators are constrained by memory bandwidth and capacity. ACE3 addresses this with a software-based acceleration technique that optimizes data handling and load balancing across heterogeneous compute units, unlocking more performance from existing hardware and enabling much faster training of complex AI models without new specialized accelerators.

After being commercialized through a spin-off company, ACE3 AI LTD, this technology is now available through a user-friendly platform that delivers these optimizations to industry and research teams. In partnership with industries, the ACE3 platform has shown significant reductions in training time and computing costs on real-world workloads. ACE3 AI LTD’s broader vision is to democratize advanced AI by easing hardware constraints and enabling more organizations to use state-of-the-art models without massive infrastructure investments.

The ACE3 team members are Dr. Xiaoyang Sun, Professor Jie Xu, and Professor Zheng Wang.

Belfort: Hardware acceleration for computing on encrypted data – Ingrid Verbauwhede, KU Leuven / Belfort, Belgium

Belfort is a new KU Leuven spinoff. It has launched the world’s first available product that accelerates encrypted compute in hardware, making it possible to process encrypted data without ever decrypting it. It allows servers to compute directly on encrypted inputs, so sensitive information is never exposed, even during execution. Historically, this approach has been too slow and costly for real-world use. With Belfort’s custom hardware architecture, encrypted compute is now viable in real time for the first practical workloads. From fraud detection to genomic analysis, privacy-preserving applications are moving from theory to reality.

Belfort is a spinoff from KU Leuven’s COSIC (Computer Security and Industrial Cryptography) lab, a global leader in secure computation and cryptographic hardware. The research underpinning Belfort’s core technology was developed over several years, and matured through several grants and research projects, including two grants from the European Research Council.

Accelerating early software development: A high-performance parallel hardware-simulation framework – Nils Bosbach, RWTH Aachen University, Germany

The Institute for Communication Technologies and Embedded Systems (ICE) at RWTH Aachen University has transferred a parallelization and co-simulation technology for SystemC-based virtual prototypes to MachineWare GmbH. The package combines a generic intra-process parallelization strategy for virtual central processing unit (CPU) models with a multi-process co-simulation orchestration layer. Integrated into MachineWare’s ecosystem, the technology delivers faster virtual-platform execution, enabling broader CI/regression coverage, earlier bug discovery, and more efficient pre-silicon software development for heterogeneous system-on-chips (SoCs).

Novel intermediate representation for efficient recursive query processing – Amir Shaikhha, University of Edinburgh, UK

Recursive query processing underpins a broad range of applications — from databases and knowledge-graph management to declarative networking, artificial intelligence, and machine learning. This knowledge transfer involves a novel intermediate representation (IR) for recursive queries, called TempoDL, together with its associated compilation and optimization techniques, introduced in ‘Optimizing Nested Recursive Queries’ (SIGMOD 2024). This transfer enables the direct incorporation of TempoDL and its associated compilation pipeline, developed in collaboration between the University of Edinburgh and RelationalAI, into an industrial relational knowledge-graph platform, allowing customers to express rich, recursive business logic with production-grade performance, scalability, and semantic guarantees.

Ximplic: Simplifying computing-in-memory – Simranjeet Singh and Farhad Merchant, University of Groningen, The Netherlands

The embedded system-on-chip (SoC) market is rapidly expanding, driven by the need for compact, energy-efficient, and high-performance computing solutions across sectors such as edge AI, the internet of things (IoT), automotive, and industrial automation. Valued at USD 169.5 billion in 2023 and projected to reach USD 295.5 billion by 2030 (CAGR ≈ 8.5%), this market’s growth is increasingly constrained by the traditional von Neumann bottleneck, where excessive data movement between memory and processor dominates energy consumption and latency. Computing-in-memory (CiM) directly addresses this limitation by integrating computation within memory arrays, thereby minimizing data transfer, enhancing parallelism, and enabling orders-of-magnitude improvements in energy efficiency. From a market-demand perspective, embedding CiM functionality into SoCs offers a disruptive advantage for real-time AI inference, sensor-edge processing, and low-power autonomous systems. As major semiconductor companies and startups alike invest in CiM-enabled architectures, the technology is poised to redefine the performance-efficiency balance of embedded SoCs and capture a significant portion of this rapidly growing market.

However, a major challenge in deploying CiM architectures lies in the extended development cycle associated with their complex integration into SoCs. In practice, CiM designs can take more than twice the design time compared to conventional modern complex SoCs. To address this critical bottleneck, Farhad Merchant, and Simranjeet Singh, researchers at the University of Groningen, have founded a spin-off company, Ximplic, dedicated to accelerating the design of computing-in-memory architectures through advanced electronic design automation (EDA) tools and intellectual property blocks (IPs).

Ximplic’s EDA platform and IPs tackle these challenges with a device-agnostic ecosystem tailored for CiM workflows. It supports any underlying device technology while unifying modelling, simulation, logic synthesis, and hardware prototyping within a single intelligent environment. Designers can seamlessly move from concept to silicon, independent of the memory technology, enabling rapid exploration and implementation. By simplifying complexity across the entire hardware design flow, Ximplic empowers faster innovation from device physics to system-level realization, paving the way for the next generation of energy-efficient, memory-driven computing.

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