IObundle, Lda. is a system-level Semiconductor IP (SIP) company, founded in April 2018, and with its main office in Lisbon, Portugal.
With the demise of Moore’s law, systems are growing in terms of parallelism, not in terms of frequency of operation. The demand for processors, hardware accelerators and specialized designs is increasing.
Our goal is to create, distribute and support alternative architectures using RISC-V CPUs, programmable hardware accelerators, and various custom hardware blocks.
IObundle promotes IOb-SoC, an open source and free of charge Verilog/C++ System on Chip template, comprising a size-optimized RISC-V processor, internal RAM system with booting support, and configurable cache system with L1 instruction/data caches plus a shared L2 cache.
IObundle also promotes IOb-Versat, another open source and free of charge Verilog/C++ SIP. IOb-Versat is a Coarse Grained Reconfigurable Array for accelerating edge computing applications in an energy-efficient way.
Our business model is to provide custom systems, IP cores and software using the above infrastructure, and associated engineering design services.
Our IPs are verified using software models, RTL simulation and FPGA testing, in order to provide a quality experience to our customers.