We are seeking a highly motivated PhD candidate to join our research team working on next-generation secure computing architectures. The successful candidate will contribute to the design, analysis, and evaluation of novel microarchitectural protection mechanisms against side-channel attacks in RISC-V processors.
Modern processors increasingly face sophisticated attacks that exploit microarchitectural features such as caches, branch predictors, speculative execution engines, shared resources, and timing side channels. While RISC-V is rapidly emerging as a key open hardware platform for embedded, IoT, edge, and high-performance systems, many of these security challenges remain insufficiently understood and mitigated, particularly in resource-constrained environments.
The PhD research will focus on developing security-by-design microarchitectural mechanisms capable of reducing information leakage while preserving performance, energy efficiency, and software compatibility.
Research Topics
Possible research directions include:
- Side-channel analysis of RISC-V processors and SoCs.
- Microarchitectural leakage characterization and modelling.
- Hardware and software countermeasures against side-channel attacks.
- Secure processor architecture for embedded and IoT systems.
- Hardware/software co-design for security.
- Evaluation frameworks and benchmarks for RISC-V security.
- Formal methods for hardware security verification.
- Security evaluation using FPGA-based prototypes.
Candidate Profile
Applicants should hold, or be close to completing, a Master’s degree in one of the following fields:
- Computer Engineering
- Electrical Engineering
- Electronic Engineering
- Telecommunications Engineering
- Computer Science
- Cybersecurity
- Related disciplines
Candidates should have a strong background in some of the following areas:
- Computer architecture
- Digital design and hardware systems
- Embedded systems
- Operating systems
- Hardware security
- Cryptography
- FPGA development
- Programming in C/C++, Python, and/or hardware description languages (Verilog, SystemVerilog, or VHDL)
Experience with RISC-V, hardware security, side-channel analysis, or processor design is highly desirable but not mandatory.
What We Offer
- A fully funded PhD position (28.000 €/year gross salary) within an internationally recognized research team.
- Collaboration with leading academic and industrial partners across Europe.
- Access to state-of-the-art hardware security laboratories and FPGA platforms.
- Opportunities to publish in top-tier conferences and journals.
- Participation in international research projects and scientific events.
- Training in hardware security, secure processor design, and RISC-V technologies.
How to Apply
Interested candidates should submit the following documents to [email protected]:
- Curriculum Vitae (CV)
- Academic transcripts
- Motivation letter outlining their research interests
- Contact details of two academic or professional references
Expected Impact
The PhD research will contribute to strengthening the security of future RISC-V processors by developing innovative approaches to identify, characterize, and mitigate microarchitectural vulnerabilities. The expected outcomes will advance secure processor design and support the development of trustworthy open hardware architectures for next-generation computing systems through the QUASAR EU project.
