HiPEAC

Making Caches Predictable: Bounded Lifetime Monitoring and Management for Real-Time Systems

Context

Caches are one of the main reasons modern processors are fast — and one of the main reasons real-time systems are hard to certify.

In safety-critical domains such as autonomous vehicles, avionics, robotics, industrial control, and cyber-physical systems, software must not only produce the correct result; it must also do so within a guaranteed deadline. To provide such guarantees, engineers need reliable bounds on the Worst-Case Execution Time, WCET, of each task. Yet caches make this difficult: they evict data that will be needed later, and create interference between tasks or even within the same task.

Today, much of this interference is treated pessimistically. Timing analyses often assume worst-case cache behavior because they cannot precisely know which cache blocks are hits or misses. This pessimism leads to overestimated WCET bounds, reduced schedulability, underused hardware resources, and more expensive system designs.

The goal of this PhD is to design mechanisms that turn caches from a source of unpredictability into a resource that can be controlled, reasoned about, and exploited more efficiently in real-time systems.

Research Activities

This PhD focuses on the design, analysis, implementation, and evaluation of predictable cache management mechanisms for real-time systems, with the goal of improving execution efficiency while enabling tighter and more reliable WCET bounds.

To achieve that, we will propose low-overhead, bounded, and analyzable mechanisms for monitoring memory block lifetimes and cache management mechanisms to reduce WCET pessimism. We will investigate hardware-assisted and software-assisted mechanisms to monitor the runtime evolution of memory object lifetimes in the cache hierarchy. The monitoring mechanisms must have constant and bounded overhead, independent of the cache state, so that they remain compatible with WCET analysis. We will design runtime cache management mechanisms that enforce allocation and scheduling decisions, at different granularities. We will evaluate these mechanisms in terms of predictability, implementation complexity, compatibility with memory hierarchies and cache coherence protocols, and performance impact. The PhD will include a systematic analysis of the trade-offs between monitoring granularity, management granularity, runtime overhead, WCET pessimism, and system performance.

The research will bridge offline scheduling, cache allocation, and runtime enforcement to improve both predictability and efficiency in real-time systems.

We have opening position in this research topic for PhD, postdoctoral and internship levels.


About

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Inria Rennes

Inria Rennes is a research center dedicated to computer science and applied mathematics. We foster innovation through collaboration, focusing on cutting-edge technologies and solutions to address real-world challenges.


Metadata

Application areas: Automotive, Avionics, Defence, Space

Topics: Computer architecture, CPU IP, CPUs, Data management, Design Space Exploration, Embedded Systems, Hardware, Memory, Multicore / Manycore, Optimization, Resource management / Scheduling, Runtime performance, Safety