CompContinuum: Computing Continuum of Cloud, Edge, and IoT Technologies Monday Jan. 26, 2026 | 14:00 - 17:30 (CET) | room: “Extra 1” - ICE Kraków
14:00 : Welcome & Workshop Agenda
14:10 : Ramon Canal (UPC & BSC): “VITAMIN-V: A Comprehensive Open-Source RISC‑V Hardware–Software Stack”
abstract: Vitamin‑V delivers a comprehensive open-source RISC‑V hardware–software stack tailored for edge and cloud infrastructures, integrating virtualization, cryptography, and vectorization support across QEMU, gem5, and FPGA prototypes. The project advances compiler and toolchain ecosystems by extending the RISC-V LLVM port and enabling VM/container/serverless orchestration frameworks such as OpenStack and Kubernetes on RISC‑V platforms. To ensure reliability and security, Vitamin‑V introduces novel validation and verification methodologies addressing ISA extensions and silent data corruption, complemented by hardware-assisted malware detection techniques and released public datasets. The software ported, models and datasets are public and they are enabler for scalable, secure, and fully open-source RISC‑V adoption cloud services.
speaker: Ramon Canal is a professor at UPC-Barcelona Tech. He received the MS and PhD degrees from the UPC. He worked at Sun Microsystems in 2000, and he was a Fulbright visiting scholar at Harvard University in 2006/2007 and a visiting professor at the University of Cyprus 2019/2020. He was the associate-dean of postgraduate studies at the Barcelona School of Informatics (UPC) 2013-2017. His current research efforts are focused on technology modelling, reliability and adaptability of memories and architectures. He takes a cross-layer approach from circuits to OS focusing on Cloud architectures. He coordinates the VITAMIN-V project.
14:35 : Stratos Psomadakis (CSLab - School of ECE, NTUA): “Optimizing OS memory management on ARMv8 and RISC-V architectures for HPC and Cloud workloads”
abstract: As the memory footprints of HPC and Cloud workloads expand, address translation becomes a critical performance bottleneck. This talk will present Elastic Translations, a holistic OS memory management solution, developed within the AERO project, that exploits OS-assisted TLB coalescing, supported by the ARMv8-A and RISC-V architectures, to alleviate the translation overhead of virtual memory. Elastic Translations showcase how architecture-tailored OS memory management can unlock the full potential of emerging data center platforms.
speaker: Stratos Psomadakis is a postdoctoral researcher at the Computing Systems Laboratory (CSLab) of the National Technical University of Athens (NTUA). His research interests lie in the intersection of Operating Systems, Virtualization, and Hardware, with a focus on virtual memory, memory management, and serverless function sandboxing. He has contributed to research that has received best paper awards (ASPLOS, HotStorage), as well as HiPEAC paper awards. Prior to his PhD studies at NTUA, he worked at the Greek National Infrastructures for Research and Technology (GRNET), as a Cloud Engineer and Site Reliability Engineer (SRE), contributing to the development and deployment of GRNET’s cloud service (~okeanos, Synnefo). During that time, he also contributed to the Gentoo Linux project, assisting with the maintenance of the Gentoo Linux kernel.
15:00 : Break (30 min)
15:30 : Ivy Peng (KTH): “Converged HPC and Cloud Computing: Lessons and Experience from the OpenCUBE Project” abstract: As computing demands grow, the traditional boundaries between HPC and Cloud are increasingly blurred, calling for a continuum that combines the performance of HPC with the flexibility of Cloud. This talk explores the convergence of these computing paradigms, highlighting approaches and real-world case studies that demonstrate dynamic adaptivity, efficient resource use, and rapid access to emerging hardware. We will share our experience in application adaptation and workflow management in the OpenCUBE project and discuss ongoing efforts at the system, middleware, and application levels to overcome them.
speaker: Ivy Peng is an Associate Professor in Computer Science at KTH in Sweden. She leads the Scalable Computing research group (ScaLab). Her research revolves around large-scale parallel systems, including computer architecture, system software, and real-world applications. Her current research topics are heterogeneous computing, memory-centric computing, and disaggregated computing, with a particular focus on converged HPC and cloud. She serves technical program committee, organization committee, and journal review boards including IEEE TPDS, the IEEE, SC, HPDC, PPoPP, IPDPS, CCGrid, HotStorage, ISC, etc.
15:55 : Leonidas Kosmidis (BSC): “Post Quantum Resilience: A need for the RISC-V Computing Continuum”
abstract: The fast evolution of Quantum Computers has put at risk traditional cryptographic algorithms and any system across the Computing Continuum relying on them, since the protection they offer will be obsolete in a few years from now. This gives us just a few years to migrate to new Post Quantum Cryptographic (PQC) algorithms which are resistant to quantum computers, and creates new opportunities to include relevant features in the RISC-V ISA and processors. In particular, PQC migration is a priority of the European Commission with several funded projects. The PQC4eMRTD CSA action is a one of them, focusing on machine readable travel documents, which have many similarities with other types of systems. In this talk, we will provide an overview of the security needs across the Computing Continuum, and cover the current actions related to PQC within the RISC-V ecosystem.
speaker: Dr. Leonidas Kosmidis is the Group Leader of the Hardware Dependability for Embedded Systems (HADES) group at the Barcelona Supercomputing Center (BSC) and Faculty member at the Universitat Politècnica de Catalunya (UPC). His research interests include hardware and software design for high performance safe and secure embedded systems, and particularly GPUs. He was the recipient of the RISC-V Educator of the Year Award in 2019 and he is involved in several standardisation efforts around RISC-V, hardware design and GPUs for safety critical systems.
16:20 : Manolis Marazakis (FORTH): “What about European Server Systems ? Perspectives from the RISER and HIGHER Projects”
abstract: The RISER project aims to build European data-center platforms using RISC-V and open standards for cloud services. Key components include RISC-V processors from EPI/EUPilot projects, server boards following industry standards (PCIe, NVMe, 100Gbps Ethernet), and open-source software stacks. Two deployment models are pursued: Host+Accelerator (using OpenMP task offload with a new “spread” primitive) and Microserver (with K3S Kubernetes ported to RISC-V). Prototypes use EPAC 1.5 test-chips on FPGA carrier boards. Challenges remain in IP block availability and integration for both accelerators and servers, particularly regarding high-speed I/O and production-ready software stacks. The HIGHER project continues this work with expanded scope, adopting Open Compute Project standards (HPM, DC-SCM), supporting both Arm and RISC-V processors, and adding CXL-based disaggregated memory capabilities across a computing continuum spanning edge to cloud. These efforts underscore Europe’s path to digital sovereignty in cloud infrastructure through open instruction set architectures, with RISC-V at the center of this transformation. As the technology matures from embedded applications to the data-center, it offers a compelling dual advantage: freedom from proprietary licensing constraints enabling fully European hardware-software stacks, combined with flexibility to customize processor architectures for specific workloads in heterogeneous system configurations. With European processors (with both the Arm and RISC-V ISAs) becoming available, software ecosystem maturation, and Open Compute Project integration underway, the RISER and HIGHER projects are contributing towards crossing the threshold from promising design concept to deployable cloud infrastructure.
speaker: Dr. Manolis Marazakis is a Principal Staff Research Scientist at the Institute of Computer science, FORTH. His research interests are in architectures and efficient systems software, mainly resource management and storage I/O middleware, for high-performance servers in data center environments. He has contributed to the design, implementation and performance analysis of several system prototypes for HPC, data analytics, multi-tenant workloads, and the convergence of HPC and Cloud infrastructures. He is the coordinator of the RISER project (https://riser-project.eu) that aims to build accelerator and microserver systems based on RISC-V chips from ongoing European projects funded by the EuroHPC JU.
16:45 : Panel & Extended Q&A
Topics: (a) What is a data centre system nowadays ?
(b) Alternative futures towards full systems based on open standards ?
17:20 - 17:25 : Closing remarks
The 4th Workshop on Computing Continuum (CompContinuum’26) will provide the computing systems community with a dedicated venue for discussing fundamental challenges and research opportunities, deployment efforts, state-of-the-art and best practices in supporting efficient combinations of Cloud, Edge, HPC, and IoT technologies in a computing continuum setting. The half-day workshop aims to foster discussion of the following topics: What changes and optimizations to hardware and system architecture are critical for enabling the computing continuum? What changes to the software stack, including drivers, operating systems, middleware, and system software, are needed? What is critical for enabling a computing continuum’s power and energy efficiency, while contributing to achieving the goals of the European Green Deal? What workloads can leverage the heterogeneity, elasticity, and dynamic resource provisioning from the computing continuum?