With this call, authors are cordially invited to submit their papers for the HiPEAC 2025 conference. Topics of interest include, but are not limited to:
- Processor, memory, interconnect, and storage architectures
- Parallel, multicore and heterogeneous systems
- Interconnection networks
- Architectural support for programming productivity
- Power, performance and implementation efficient designs
- Reliability and real-time support in processors, compilers and runtime systems
- Application-specific processors, accelerators and reconfigurable processors
- Architecture and programming environments for GPU-based computing
- Architectural simulation and methodology
- Architectural and runtime support for programming languages
- Programming models, frameworks and environments for exploiting parallelism
- Program characterization and analysis techniques
- Dynamic compilation, adaptive execution, and continuous profiling/optimization
- Binary translation/optimization
- Code size/memory footprint optimizations
- Architectures for emerging technologies such as neuromorphic, photonics, quantum, etc.
- Machine learning applied to the above
- Computing systems research from application studies
Journal-first model
HiPEAC was one of the pioneers of the journal-first model. All applicants who submit their paper to the open-access journal Transactions on Architecture and Code Optimization (ACM TACO) by 1 June 2024 and whose paper is accepted will be invited to present their paper at HiPEAC 2025.
