HiPEAC’s Tech Transfer Awards recognize successful examples of technology transfer, which covers technology licensing, providing dedicated services or creating a new company, for example. In addition to a certificate, first-time winners are awarded the sum of €1,000 for the team that developed the technology.
For the purposes of the awards, technology transfer is defined as a contractually documented joint- or privately funded academia-industry project or technology licence agreement, with the goal of bringing a concrete research result into industrial practice. All applications are evaluated by an internal technology transfer committee.
This year, eight winners have been selected:
Pouya Esmaili-Dokht (BSC), Petar Radojković (BSC), Xavier Martorell (BSC), Paolo Amato (Micron), Jason Adlard (Micron): Performance, power and energy impact of Micron’s novel HPC memory systems: hardware simulation and performance modelling
Barcelona Supercomputing Center (BSC) has provided Micron Technology Inc., an industry leader in innovative memory and storage solutions, dedicated services to address the challenge of quantifying the impact of novel memory devices on the overall performance, power and energy consumption of memory systems for HPC.
In particular, BSC provided its expertise in HPC system production use, HPC applications, system simulation and performance analysis to quantify potential benefits of Micron’s novel memory system solutions. These solutions include various memory technologies, packaging and interfaces that could influence future memory industrial standards.
Gianluca Palermo, Davide Gadioli, Emanuele Vitali and Cristina Silvano (PoliMi) - GeoDock: a fast and configurable pocket-aware ligand pose generator for high-throughput molecular docking
Molecular docking remains an important tool for screening a large database of small molecule compounds (called ligands) during the in-silico phase of the drug discovery process. The problem of molecular docking results in its complexity. GeoDock is a configurable and auto-tunable software library that exploits approximate computing techniques for automating the generation of ligand poses based on the geometric configuration of the target protein pocket.
Thanks to the transfer of the technology from Politecnico di Milano to Dompé Farmaceutici, a pharmaceutical company, GeoDock has been included within LIGEN, its proprietary drug-discovery software. This inclusion boosted the performance of the software that is one of the main component of EXSCALATE (EXaSCale smArt pLatform Against paThogTns). This platform is currently in use in the search for candidate new drugs to be used as an effective therapy to fight COVID-19 in the context of the ongoing EU-funded Exscalate4Cov project.
Gianluca Giuffrida (University of Pisa) - CloudScout segmentation neural network
The University of Pisa transferred to Cosine Measurement, a Dutch company specialized in the development of measurement systems involved in several European Space Agency (ESA) projects, knowledge and expertise in the design and development of custom neural network in order to improve the functionality of company products.
Cosine Measurement together with ESA wanted to test the capability of the Intel Movidius Myriad-2 VPU, which has already passed the radiation test at CERN. The University of Pisa was engaged by the company in the framework PhiSat-1 mission to develop a Segmentation DNN called CloudScout DNN that suited the Myriad-2 VPU. It is able to classify each pixel of the input hyperspectral image as cloudy or not cloudy and return a map of the input image.
The CloudScout DNN was developed taking into account the constraints of the Myriad-2 VPU accelerator while maintaining a high inference ratio (102 ms per images), low number of false positive results (~6% on pixels), 1.8W of power consumption, and pixel wise accuracy of 88.4%. The network is now flying as part of the software payload of the PhiSat-1 satellite mission launched in September 2020. The mission is the first experiment to demonstrate how DNN and in particular deep-CNN can be used for Earth observation – in this case, filtering out images containing more than 70% of cloudy pixels so that only usable data are returned to Earth.
Matthias Jung (Fraunhofer IESE), Lukas Steiner and Norbert Wehn (TUK) - DRAMSys4.0: A flexible DRAM subsystem design space exploration framework
DRAMSys4.0 is a flexible and fast DRAM subsystem design space exploration framework based on SystemC TLM-2.0. It is designed to tackle the challenges of today’s memory systems with respect to applications, performance, power, temperature, retention errors, and different DRAM architectures. DRAMSys4.0 is being published as open-source software under the BSD3 license. Before the latest features of DRAMSys, such as DDR5 or LPDDR5, are released as open source, Fraunhofer IESE offers commercial licenses to partner companies for early application of the simulation models and consulting.
Within the framework of the MEMTONOMY project, Fraunhofer IESE aims to transfer to industry the results of basic research at the Technische Universität Kaiserslautern (TUK) on modern DRAM memory systems.
Rambus Inc., a leading provider of silicon IP, chips for high-quality memory, SerDes, and embedded security solutions, showed interest in the DRAMSys tool and therefore started a cooperation with Fraunhofer IESE in September 2020.
Rambus is getting access to the research branch of the DRAMSys tool, which allows simulation of state-of-the-art memory technology. For the academic partners, the collaboration with Rambus will yield valuable feedback regarding market needs, thereby enabling further improvement of the DRAMSys infrastructure towards broader applicability in industry.
Ricardo Carmona-Galan (CSIC) - PHOTONVIS: a pilot for a scalable solid-state LiDAR
PHOTONVIS is a new technology-based company created to develop and commercialize CMOS-SPAD sensors. It is currently working on a proof of concept that involves the development of a prototype LiDAR system based on previous results of the research group on Integrated Interface Circuits and Sensory Systems (I2CASS) of the Institute of Microelectronics of Seville, a group in a centre jointly run by the CSIC and the University of Seville.
The sensors in question are CMOS image sensor chips with built-in processing for the extraction of 3D information. These chips combine single-photon avalanche diodes (SPAD) with in-pixel time-to-digital converters (TDC) to realize a direct estimation of the time of flight (ToF) of the photons. These sensors are a fundamental piece of the solid-state LiDAR.
PHOTONVIS SL was incorporated on July 4, 2019, with an initial contribution of seed capital from a venture capital fund. Other members of the team are Prof. Angel Rodriguez-Vazquez and postdoctoral researchers Ion Vornicu and Angela Darie.
Silvia Panicacci (University of Pisa) - SatNav E@syCare
IngeniArs S.r.l. is a spin-off of the University of Pisa and is specialized in developing and delivering cutting edge hardware/software solutions in challenging areas such as aerospace, healthcare and automotive.
In the healthcare area, the company’s main product is E@syCare. It is an advanced system comprising a cloud-based web application and mobile applications for remote monitoring of vital parameters through biomedical Bluetooth sensors and other patient wellbeing metrics by medical staff.
During the Covid-19 outbreak, IngeniArs showed interest for expanding E@syCare, introducing patient positioning by exploiting satellite segments. Its usefulness is twofold: track people’s position (both for quarantine and for outdoor physical activity) and do epidemiological studies. Then, the University of Pisa developed the smartwatch and the epidemiological independent modules, to be integrated in E@syCare and possibly in other telemedicine platforms. Through the smartwatch module, and so adding a commercial smartwatch to the set of sensors of the E@syCare platform, it is possible to detect the positions of the patients during the day and to monitor indoor and outdoor fitness sessions. The epidemiological module allows to show clusters of people by means of certain vital parameter in a certain radius, improving the medical analysis of the pandemic diffusion.
With this technology transfer, SatNav E@syCare was born.
Yannis Papaefstathiou, Nikolaos Tampouratzis (EXAPSYS) - Very fast and accurate simulator of HPC and CPS systems
COSSIM is a highly innovative CPS/HPC/cloud simulation framework capable of simulating any kind of multi-core CPUs, networks and I/O under one roof and in a fully synchronized manner, supporting up to cycle-accuracy; no similar simulation package is available on the market. Moreover, since COSSIM is fully parallel by design, it is significantly faster than current fragmented solutions while being able to address more design aspects and provide more features.
The main parts of the COSSIM simulator (i.e. the synchronization architecture and implementation and certain models) have been exclusively licensed from Telecommunication Systems Institute (TSI), a research institute at the Technical University of Crete (TuC), to Exascale Performance Systems - EXAPSYS Plc, which has been created mainly for the commercial exploitation of research results from two research centres, starting with the COSSIM simulator. Additionally, some other parts of the COSSIM simulator (e.g. precise models for certain CPUs) have been exclusively licensed from Synelixis Solutions S.A. to EXAPSYS Plc.
Dominik Šišejković (RWTH Aachen University) - A scalable logic locking framework for hardware integrity protection and its application to a RISC-V processor
Nowadays the semiconductor industry relies heavily on third party intellectual property (IP), the involvement of external design houses and outsourcing the fabrication to off-site facilities. This business model accommodates for the ever increasing need to reduce production costs and shorten the design and fabrication cycles, but unfortunately it also gives rise to a variety of serious security concerns; ranging from IP piracy to the insertion of malicious circuit modifications known as hardware Trojans.
Logic locking - a HW obfuscation technique - has been identified as a leading method to safeguard the integrity of HW designs, as it can protect against adversaries located anywhere in the IC supply chain.
RWTH Aachen has transferred to the industrial partner HENSOLDT Cyber GmbH: • An industry-ready logic locking software framework for the application of scalable locking schemes to protect hardware designs in the IC design and fabrication flow. The framework offers all necessary facilities to test, evaluate and verify logic locking schemes on multi-module hardware designs. This framework offers the first tool to efficiently protect silicon-proven designs in an industry setting. • A fully logic-locked 64-bit linux-ready RISC-V processor core. The functionality of the locking mechanism was tested and verified with formal methods and prototyped on an FPGA board. This protected core presents the foundation of the first logic locked and fabricated RISC-V Made in Germany - MiG-V - processor core and the first locked core available on the global marked. The software framework and the delivered processor offer a great potential for the company to create a family of HW protected products and position itself as a leader in security-critical solutions.