Ninth International Summer School on Advanced Computer Architecture and Compilation for High-Performance and Embedded Systems
14-20 july, 2013, Fiuggi, Italy
The growing sophistication and complexity of embedded applications requires similarly rapid increases in embedded systems performance. This trend is both a challenge for the embedded systems community and an opportunity for the emergence of novel technologies in architecture, compilation and programming.
The HiPEAC Summer School is organized by the HiPEAC Network of Excellence.
The European HiPEAC network of excellence addresses the design and implementation of high-performance commodity computing devices for embedded systems, covering both processor architecture and programming/ compilation infrastructure.
The goal of the HiPEAC network is to strengthen the research community in this domain, by gathering the leading European academic and industrial groups in one virtual center of excellence.
The "HiPEAC Summer School" is a one week summer school for computer architects and compiler builders working in the field of high performance computer architecture and compilation for embedded systems. The school aims at the dissemination of advanced scientific knowledge and the promotion of international contacts among scientists from academia and industry.
A distinguishing feature of this Summer School is its broad scope ranging from low level technological issues to advanced compilation techniques. In the design of modern computer systems one has to be knowledgeable about architecture as well as about the quality of the code, and how to improve it. This summer school offers the ideal mix of the two worlds – both at the entry level and at the most advanced level.
The summer school is open to everybody but previous training and/or experience in computer science as well as a background in computer architecture or compilation is indispensable.
News- Early registration deadline: 31 March 2013
- Chair: Koen De Bosschere, Ghent University, Belgium
- Emre Ozer, ARM, UK
- Mateo Valero, BSC, Spain
- Marc Duranton, CEA, France
- Per Stenström, Chalmers, Sweden
- Mike O’Boyle, University of Edinburgh, UK
- András Vajda, Ericsson, Sweden
- Manolis Katevenis, FORTH, Greece
- Bilha Mendelsohn, IBM Haifa, Israel
- Olivier Temam, INRIA Futurs, France
- Paul Heysters, Recore Systems, The Netherlands
- Rainer Leupers, RWTH Aachen, Germany
- Giuseppe Desoli, STMicrolectronics, Italy
- Philippe Bonnot, Thales R&T, France