HiPEAC European Network of Excellence on High Performance and Embedded Architecture and Compilation

SMART'09: 3rd Workshop on Statistical and Machine learning approaches to ARchitectures and compilaTion

January 25, 2009
Paphos, Cyprus
(co-located with HiPEAC 2009 Conference)

Supported by

Preliminary program HERE

The rapid rate of architectural change and the large diversity of architecture features has made it increasingly difficult for compiler writers to keep pace with microprocessor evolution. This problem has been compounded by the introduction of multicores.  Thus, compiler writers have an intractably complex problem to solve.  A similar situation arises in processor design where new approaches are needed to help computer architects make the best use of new underlying technologies and to design systems well adapted to futureapplication domains.

Recent studies have shown the great potential of statistical machine learning and search strategies for compilation and machine design.  The purpose of this workshop is to help consolidate and advance the state of the art in this emerging area of research. The workshop is a forum for the presentation of recent developments in compiler techniques and machine design methodologies based on space exploration and statistical machine learning approaches with the objective of improving performance, parallelism, scalability, and adaptability.

Topics of interest include (but are not limited to):

Machine Learning, Statistical Approaches, or Search applied to

  • Feedback-Directed Compilation
  • Auto-tuning Programs + Language Extensions
  • Library Generators
  • Iterative Compilation
  • Dynamic Compilation/Adaptive Execution
  • Parallel Compiler Optimizations
  • Low-power Optimizations
  • Simulation
  • Performance Models
  • Adaptive Processor and System Architecture
  • Design Space Exploration
  • Other Topics relevant to Intelligent and Adaptive Compilers/Architectures
Paper Submission Guidelines:

Paper length - maximum 15 pages.

Papers must be submitted in the PDF (preferably) or postscript formats using the workshop submission website. We suggest to use LNCS LaTeX templates that can be found here (go to "For Authors" and then "Information for LNCS Authors").

All accepted papers will appear on the workshop website.


Selected papers will be considered for publication
in a special issue of the International Journal of Parallel Programming.

Important Dates:

Final deadline for submission: November 21, 2008
Decision notification: December 19, 2008
Workshop: January 25, 2009

Program Chair:

David Padua, University of Illinois, USA


Grigori Fursin, INRIA Saclay, France
John Cavazos, University of Delaware, USA

Program Committee:

Saman Amarasinghe, MIT, USA
Francois Bodin, CAPS Enterprise, France
Calin Cascaval, IBM T.J. Watson Research Center, USA
John Cavazos, University of Delaware, USA
Franz Franchetti, Carnegie Mellon University, USA
Ari Freund, IBM Haifa Research Lab, Israel
Grigori Fursin, INRIA Saclay, France
Mary Hall, USC/ISI, USA
Robert Hundt, Google, USA
Michael O'Boyle, University of Edinburgh, UK
David Padua, University of Illinois at Urbana-Champaign, USA
Richard Vuduc, Georgia Institute of Technology, USA
David Whalley, Florida State University, USA

Panel: Can machine learning help to solve the multicore code generation issues?

Chair: Francois Bodin, CAPS-Enterprise, France

Marcelo Cintra, University of Edinburgh, UK
Bilha Mendelson, IBM, Israel
Lawrence Rauchwerger,Texas A&M University, USA
Per Stenstrom,Chalmers University of Technology, Sweden

Previous Workshops:


Call for papers: colored flyer in pdf
MILEPOST GCC: machine learning based interactive research compiler


smart-workshop-09.pdf42.98 KB
Saturday, January 24, 2009 to Sunday, January 25, 2009