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<TITLE>SUBMISSION DEADLINE EXTENDED: 1st HiPeac Workshop on Design for Reliability (DFR'09)</TITLE>
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<P><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">(We apologize if you receive multiple copies of this message.)</FONT> </SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">DEADLINE EXTENSION: The deadline for submissions has been extended to November 10, 2008, 11:59PM PST. An abstract must be deposited by the original deadline, November 3, 2008, 11:59PM PST.</FONT><FONT FACE="Times New Roman"> </FONT></SPAN></P>
<P><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">RECENT NEWS: Selected papers will be considered for inclusion on a special issue of the Transactions on HiPEAC, </FONT></SPAN><A HREF="http://www.hipeac.net/journal"><SPAN LANG="en-us"><U><FONT COLOR="#0000FF" SIZE=2 FACE="Arial">http://www.hipeac.net/journal</FONT></U></SPAN></A><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">.<BR>
</FONT></SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">Please feel free to contact us if you have any questions. </FONT></SPAN>
<BR>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">************************************************************************<BR>
CALL FOR PAPERS FOR THE 1st Workshop on Design for Reliability (DFR'09)</FONT></SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">held in conjunction with the 4th International Conference on High Performance and</FONT> </SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">Embedded Architectures and Compilers (HiPEAC'09) </FONT></SPAN><A HREF="http://www.hipeac.net/conference/"><SPAN LANG="en-us"><U><FONT COLOR="#0000FF" SIZE=2 FACE="Arial">http://www.hipeac.net/conference/</FONT></U></SPAN></A><SPAN LANG="en-us"><BR>
<FONT SIZE=2 FACE="Arial">January 25-28, 2009 Paphos, CYPRUS<BR>
<BR>
Important dates:<BR>
<B>Abstract Deadline: November 3, 11:59PM PST</B></FONT><FONT FACE="Times New Roman"> </FONT></SPAN>
<BR><SPAN LANG="en-us"><B><FONT SIZE=2 FACE="Arial">Submission Deadline: November 10, 11:59PM PST (extended)</FONT></B><BR>
<FONT SIZE=2 FACE="Arial">Notification of acceptance: December 8, 2008</FONT><FONT FACE="Times New Roman"> </FONT></SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">Camera-ready submission: December 19, 2008</FONT><FONT FACE="Times New Roman"> </FONT></SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">Workshop Date: Half Day, Sunday, January 25, 2009<BR>
<BR>
Workshop Web site:<BR>
</FONT></SPAN><A HREF="http://www.eng.ucy.ac.cy/theocharides/dfr09/index.htm"><SPAN LANG="en-us"><U><FONT COLOR="#0000FF" SIZE=2 FACE="Arial">http://www.eng.ucy.ac.cy/theocharides/dfr09/index.htm</FONT></U></SPAN></A><SPAN LANG="en-us"><BR>
<BR>
<FONT SIZE=2 FACE="Arial">Motivation:<BR>
While technology is scaling well into the nanometer era, design of reliable,<BR>
dependable and verifiable systems emerges as one of the most prominent<BR>
design challenges. As device size and power supply voltage shrink, the rate<BR>
of intermittent and permanent faults rises significantly due to design<BR>
errors, device variability and manufacturing defects, as well as<BR>
environmental impact and aging of devices. Increased process variation also<BR>
shifts the traditional deterministic design methodology towards a more<BR>
stochastic and unorthodox design paradigm. Furthermore, these issues cause<BR>
further challenges in completing design verification and manufacturing test;<BR>
such effects manifest as inherent unreliability of the components,<BR>
redefining the design and test paradigm for next-generation computing<BR>
systems. Additionally, energy reduction and performance enhancement<BR>
techniques force designs to run near zero margins, and factors which cannot<BR>
be controlled such as soft errors, thermal impact and aging, result in an<BR>
increased occurrence of transient and hard faults in computing systems.<BR>
<BR>
The goal of DFR'09 is to stimulate interest in an emerging and challenging<BR>
issue by bringing together researchers from various areas (design,<BR>
verification, test, architecture, fault-tolerance and reliability) to share<BR>
ideas and ferment future research in holistic approaches for reliable<BR>
next-generation computing systems.<BR>
<BR>
Topics of interest include (but are not limited to):<BR>
* Dependable systems from unreliable components, lifelong reliability<BR>
* Fault-Tolerant micro-architectures and system architectures<BR>
* Testing and verification strategies for the future<BR>
* On-line (dynamic) testing and verification techniques<BR>
* Software-based methodologies for fault tolerance and testing<BR>
* System validation mechanisms<BR>
* Built-in self diagnosis, self-tuning and recovery schemes<BR>
* Self-adaptive systems<BR>
* System-level design and integration for reliability, verifiability and<BR>
dependability<BR>
* Error modelling, detection, correction, and tolerance for transient and<BR>
permanent errors<BR>
* Reliable on-chip communications<BR>
* Energy/reliability/performance tradeoffs<BR>
* Aggressive power saving mechanisms<BR>
* Compiler/architecture/OS methodologies and strategies for reliability<BR>
<BR>
Submission guidelines:<BR>
Authors are invited to submit unpublished mature as well as preliminary /<BR>
on-going work. Submitted papers should be in the LNCS format (for manuscript<BR>
preparation guidelines visit </FONT></SPAN><A HREF="http://www.springeronline.com/lncs"><SPAN LANG="en-us"><U><FONT COLOR="#0000FF" SIZE=2 FACE="Arial">http://www.springeronline.com/lncs</FONT></U></SPAN></A><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">)<BR>
and should not exceed 10 pages. Papers must be submitted in the PDF<BR>
(preferably) or postscript formats to the DFR'09 submission website, which<BR>
can be found at the workshop's website..</FONT> </SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">Selected papers will be considered for inclusion on a special issue of the<BR>
Transactions on HiPEAC, </FONT></SPAN><A HREF="http://www.hipeac.net/journal"><SPAN LANG="en-us"><U><FONT COLOR="#0000FF" SIZE=2 FACE="Arial">http://www.hipeac.net/journal</FONT></U></SPAN></A><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">.</FONT><FONT FACE="Times New Roman"> </FONT></SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">Paper and electronic proceedings with all accepted papers will be</FONT> </SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">distributed at the workshop<BR>
<BR>
Program Committee:<BR>
Jacob Abraham, University of Texas at Austin,USA<BR>
Todd Austin, University of Michigan, USA<BR>
Luca Benini, University of Bologna, ITALY<BR>
David Bernstein, IBM, Haifa, ISRAEL<BR>
Davide Bertozzi, University of Ferrara, ITALY<BR>
Veerle Desmet, Ghent University, BELGIUM<BR>
Oguz Ergin, TOBB University of Economics and Technology, TURKEY<BR>
Babak Falsafi, Ecole Polytechnique Fédérale de Lausanne, SWITZERLAND<BR>
Said Hamdioui, Delft University of Technology, NETHERLANDS<BR>
Paolo Ienne, Ecole Polytechnique Fédérale de Lausanne, SWITZERLAND<BR>
Mary Jane Irwin, Pennsylvania State University, USA<BR>
Peter Marwedel, Technische Universität Dortmund, GERMANY<BR>
Maria K. Michael, University of Cyprus, CYPRUS<BR>
Shubu Mukherjee, Intel Corporation, USA<BR>
Alex Orailoglu, University of California, San Diego, USA<BR>
Emre Ozer, ARM, UK<BR>
Theocharis Theocharides, University of Cyprus, CYPRUS<BR>
<BR>
************************************************************************<BR>
Best Regards,<BR>
<BR>
The Workshop Organizers<BR>
<BR>
Alex Orailoglu, University of California, San Diego, USA<BR>
alex[at]cs[dot]ucsd[dot]edu<BR>
<BR>
Theocharis Theocharides, University of Cyprus, CYPRUS<BR>
ttheocharides[at]ucy[dot]ac[dot]cy<BR>
<BR>
Maria K. Michael, University of Cyprus, CYPRUS</FONT> </SPAN>
<BR><SPAN LANG="en-us"><FONT SIZE=2 FACE="Arial">mmichael[at]ucy[dot]ac[dot]cy</FONT><BR>
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