[HiPEAC-announce] PhD at INRIA: Infrastructures and Compilation Strategies for Heterogeneous Manycore Systems
Erven Rohou
erven.rohou at irisa.fr
Tue Feb 3 15:05:12 CET 2009
The ALF research group at INRIA Rennes (http://www.irisa.fr/caps) has an opening
for a PhD position.
Context
Multicore processors have now become mainstream for both general-purpose and
embedded computing. In the near future, every hardware platform will feature
thread level parallelism. Within a decade, it will become technologically
feasible to implement 1000's of cores on a single chip. It is also expected that
various types of cores will be implemented on the same die. At the same time,
one can expect that legacy sequential codes will be progressively replaced by
parallelized versions or newly developed parallel applications.
In order to execute efficiently these parallel applications on a large spectrum
of parallel hardware platforms, the computer science community has to invent a
new form of application portability that will replace the traditional binary
compatibility. Processor virtualization combined with split-compilation can be
used to address this portability issue. Applications are no longer directly
compiled in the final native code, but in a target independent bytecode format.
The final native code generation is delayed till the executing target is known.
It can even occur at run-time through just-in-time compilation (JIT). JIT can
leverage all dynamic information on the application execution context: actual
target processor, current machine load, input values, etc.
Thesis
While virtualization is a good alternative to binary compatibility for allowing
application portability, performance portability is a major issue. The objective
of this thesis is to explore the benefits of virtualization and
split-compilation in the context of heterogeneous manycore systems, for
achieving portable performance. The objective is to enrich processor
virtualization to allow both functional portability and high performance using
JIT at runtime, or bytecode-to-native code offline compiler. Split compilation
can be used to annotate the bytecode with relevant information that can be
helpful to the JIT at runtime or to the bytecode-to-native code offline
compiler. Because the first compilation pass occurs offline, aggressive analyses
can be run and their outcomes encoded in the binary. For example, such
information include vectorizability, memory references (in)dependencies,
suggestions derived from iterative compilation, polyhedral analysis, or integer
linear programming. Virtualization allows to postpone some optimizations to run
time, either because they increase the code size and would increase the cost of
an embedded system, or because the actual hardware platform characteristics are
unknown.
References
[1] K. Asanovic, R. Bodik, B. Catanzaro, J. Gebis, P. Husbands, K. Keutzer, D.
Patterson, W. Plishker, J. Shalf, S. Williams, and K. Yelik. The Landscape of
Parallel Computing Research: A View from Berkeley. Technical Report
UCB/EECS-2006-183, EECS Department, University of California at Berkeley,
December 2006.
[2] Koen De Bosschere, Wayne Luk, Xavier Martorell, Nacho Navarro, Mike O'Boyle,
Dionisios Pnevmatikatos, Alex Ramirez, Pascal Sainrat, André Seznec, Per
Stenström, and Olivier Temam. High-Performance Embedded Architecture and
Compilation Roadmap, volume 4050/2007 of LNCS, pages 5-29. 2007.
[3] M. Cornero, R. Costa, R. Fernández Pascual, A. Ornstein, and E. Rohou. An
Experimental Environment Validating the Suitability of CLI as an Effective
Deployment Format for Embedded Systems. In International Conference on HiPEAC,
volume 4917 of LNCS, pages 130-144, Göteborg, Sweden, January 2008.
[4] Roberto Costa and Erven Rohou. Comparing the size of .NET applications with
native code. In CODES+ISSS, pages 99-104, 2005.
[5] Chandra Krintz and Brad Calder. Using annotations to reduce dynamic
optimization time. In Proc. of PLDI, pages 156-167, 2001.
[6] Piotr Lesnicki, Albert Cohen, Grigori Fursin, Marco Cornero, Andrea
Ornstein, and Erven Rohou. Split compilation: an application to just-in-time
vectorization. In International Workshop on GCC for Research in Embedded and
Parallel Systems, Brasov, Romania, September 2007.
[7] Computing Systems Consultation Meeting. Research Challenges for Computing
Systems - ICT Workprogramme 2009-2010. European Commission - Information Society
and Media, Braga, Portugal, November 2007.
[8] Patrice Pominville, Feng Qian, Raja Vallée-Rai, Laurie Hendren, and Clark
Verbrugge. A framework for optimizing Java using attributes. In Proc. of CC,
volume 2027 of LNCS, pages 334-354, 2001.
Contacts: erven.rohou at irisa.fr or andre.seznec at irisa.fr
More information about the HiPEAC-announce
mailing list