[HiPEAC-announce] IEEE Trans. on Computers - Special Section - System level design of reliable architectures

[cristiana bolchini]

[Our apologies if you receive multiple copies of this email]

=====================================================================

			               I E E E   T r a n s.   o n   C o m p u t e r s

                                                S p e c i a l      S e  
c t i o n

                                  System level design of reliable  
architectures

=====================================================================

IEEE Transaction on Computers seeks original manuscripts for a Special  
Section on System
level design and test scheduled to appear in the second half of 2009.

The widespread of electronics in our life is directing more and more  
attention on the reliability properties
of such systems in order to preserve both users’ and environment  
health; therefore, the design of reliable
architectures is today a necessity rather than an optional even in not- 
critical application domains.
At the same time, these systems are reaching high complexity levels,  
thus leading the designer to both
develop specific components and to use and compose existing ones to  
achieve the desired overall functionality.
In the former case, ad-hoc techniques may be devised, acting on either  
the hardware or the software to cope
with the occurrence of faults. In this latter situation, when  
combining independently designed modules,
the enhancement and assessment of reliability becomes particularly  
important; for instance specific approaches
are required to be able both to apply fault detection/tolerance  
techniques from the initial steps of the design flow
and to evaluate the effects of faults in a component while interacting  
with the other ones composing the overall system.
As a result, the entire design flow needs to be enhanced to support  
reliability: from the initial modeling of the system
together with the desired properties/requirements, to the fault model,  
from the hw/sw partitioning step to the subsequent
design exploration phase, where the more traditional metrics covering  
performance, costs and power consumption
need be modified to weight also fault detection/tolerance  
capabilities. Functional verification and reliability analysis
constitute two other aspects of this scenario, to assess the quality  
of the designed system, in terms of correctness
and its ability to deal with failures.

Topics of interest are recent advances in System level design and test  
methodologies, including, but not limited to:

• Reliability-aware system level specification and modeling
• High-level fault models
• Architectural exploration for fault tolerant systems
• Reliability-driven hardware/software partitioning
• Hardware and Software techniques for system level fault detection  
and tolerance
• Design of reliable Multi-Processor System-on-Chip
• Verification methodologies for reliable systems
• Reliability analysis and fault coverage models
• Fault tolerant communication infrastructures


Submitted articles must not have been previously published or  
currently submitted for journal publication elsewhere.
As an author, you are responsible for understanding and adhering to  
our submission guidelines. You can access them
by clicking on http://www.computer.org/mc/tc/author.htm. Please  
thoroughly read these before submitting your manuscript.

Please submit your paper to Manuscript Central at     >>>>>    http://cs-ieee.manuscriptcentral.com/ 
        <<<<<<

Please feel free to contact the Peer Review Supervisor, Suzanne Werner  
at swerner at computer.org or the guest editors
at cristiana.bolchini at polimi.it, donatella.sciuto at polimi.it if you  
have any questions.

Important dates:

Submission Deadline:             						01 Nov. 2008
Reviews Completed:                						01 Jan. 2009
Major Revisions Due (if Needed):  					01 Mar. 2009
Reviews of Revisions Completed (if Needed):             15 Apr. 2009
Minor Revisions Due (if Needed):            			15 May 2009
Notification of Final Acceptance:             				27 May 2009
Publication Materials Due:           					10 Jun. 2009

Please address all other correspondence regarding this special section  
to the Guest Editors C. Bolchini and D. Sciuto.


Best regards
Cristiana Bolchini & Donatella Sciuto