[HiPEAC-announce] PhD position in Computer Architecture and Embedded Systems - INRIA (Alchemy) and Thales Research & Technology

[Sami Yehia]

The Embedded Systems Lab at Thales Research and Technology develops and 
researches technologies that shape the future of electronic systems in 
the domain of aerospace, defense and security. The lab, jointly with the 
ALCHEMY team at INRIA, a leading European research group in the field of 
computer architecture, compilers and embedded systems, is proposing a 
PhD position in the field of processor specialization and customization. 
ALCHEMY and Thales Embedded Systems Lab are both members of the HiPEAC 
Network of Excellence.

Subject: Patterns and architectures of specialized programmable 
accelerators in multi-core systems

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The ubiquity of embedded electronics in all aspects of human life 
(mobile, medical, etc..) as well as the emerging applications in 
automotive, aerospace and security industry suggest multi-core 
architectures as a natural path to scalable performance.  Those 
architectures have been widely used in embedded systems and now in 
general purpose architectures such as Intel Core Duo  and AMD Phenom 
architectures.

Nevertheless, specific embedded systems are usually subject to 
conflicting requirements such as flexibility (or "genericity") on one 
hand, in order to target large domains of applications and compensate 
for low volume production systems, and customizability on the other 
hand, in order to address each application domain specific needs.

Several accelerators have emerged in the market in different application 
domains; examples of such accelerators are Graphic accelerators (NVIDIA, 
ATI), image processing accelerators, Single instruction Multiple Data 
(SIMD) accelerators, etc.  In this context the PhD candidate will 
explore the different patterns of acceleration through existing real 
applications in the industry and in the context of existing 
accelerators, more or less programmable (GPU, SIMD, CGRA , VLIW, ASIC, 
etc.). She or he will also explore the different design options of 
accelerators such as granularity, memory architecture, flexibility, etc. 
The candidate will also study those accelerators in the context of 
parallel multiple-accelerator architectures

To summarize, The aim of this thesis is to study the different aspects 
of customization and specialized architectures in the context of 
multi-core embedded architectures; and ensure adequate 
programmability/efficacy tradeoffs of such accelerators. At the end, the 
candidate will provide some rules and methods to design accelerators 
that target several domains with a good performance density.

Expected Date: December 2008 or January 2009

Contact person: sami  dot yehia  [at] thalesgroup dot com

Sami Yehia 

Embedded Systems Lab
THALES   Research & Technology   FRANCE
RD 128 - 91767 Palaiseau cedex

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