[HiPEAC-announce] Final CFP: Second MULTIPROG Workshop in Conjunctionwith 4th Hipeac Conference

[Osman Unsal]

FINAL CALL FOR PAPERS

 

Second Workshop on Programmability Issues for Multi-Core Computers

(MULTIPROG-2009)

 

Held in conjunction with the 4th International Conference on
High-Performance 

and Embedded Architectures and Compilers (HiPEAC) 

Paphos, Cyprus, January 25-28, 2009

 

Thanks to all the Hipeac community which made Multiprog-2008 a huge success.

 

Goal of the Workshop

--------------------

Computer manufacturers have already embarked on the multi-core roadmap,
promising 

to double the number of processors on a chip every other year, and
many-cores are 

on the horizon. This shift to an increasing number of cores has placed new
burdens 

on the programming community. Until now, software has been developed with a
single 

processor in mind and it needs to be parallelized to take advantage of the
new 

breed of multi-/many-core computers. As a result, progress in how to easily
harness 

the computing power of multi-core architectures is in great demand.

 

This workshop aims to bring together, and cause fruitful interaction
between, 

researchers interested in programming models and their implementation and in


computer architecture with the common interest in advancing our knowledge
how to 

simplify the task of parallelization of software for multi-core platforms. A
wide 

spectrum of issues are central themes for this workshop such as what the
future 

programming models should look like to accelerate software productivity and
how 

it should be implemented at the runtime, the compiler, and the architecture
level.

 

We will prioritize papers reporting on on-going work that address
cross-cutting 

issues and that provide thought-provoking insights into the main themes.
Proceedings 

with accepted papers will be made available at the workshop. Selected papers
will 

appear on a special issue of Transactions on HiPEAC, after a new review
process.

 

Topics of interest

------------------

Papers are sought on topics including, but not limited to:

    * Multi-core architectures

          o Architectural support for compilers/programming models

          o Processor (core) architecture and accelerators (GPUs, ...)

          o Memory system architecture

          o Performance/power issues

    * Programming models for multi-core architectures

          o Language extensions

          o Run-time systems

          o Compiler optimizations and techniques

          o Tools for discovering and understanding parallelism

    * Applications for multi-core architectures

          o Methodologies for developing applications

          o Benchmarking

 

Organizers

----------

Eduard Ayguade Barcelona Supercomputing Center          Spain
(eduard[at]ac.upc.edu)

Roberto Gioiosa Barcelona Supercomputing Center          Spain
(roberto.gioiosa[at]bsc.es)

Per Stenstrom   Chalmers University of Technology         Sweden
(pers[at]chalmers.se)

Osman Unsal    Barcelona Supercomputing Center          Spain
(osman.unsal[at]bsc.es)

 

Important dates

---------------

Submission deadline: Oct 10, 2008

Notification to authors: Nov 28, 2008

Final version of accepted papers: Dec 19, 2008

 

Paper submission

----------------

Submitted papers should use the LNCS format and should be 12 pages maximum.
Manuscript 

preparation guidelines can be found at the LNCS web site
(www.springeronline.com/lncs,  

go to -> For Authors -> Information for LNCS Authors). Submit your paper
through the

MULTIPROG submission server (http://multiprog.ac.upc.edu/CRP/).

 

Program Committee

----------------

 

David Bernstein              IBM Research Lab in Haifa          Israel

Mats Brorsson               KTH      Sweden

Barbara Chapman          University of Houston      USA

Marcelo Cintra               University of Edinburgh   U.K.

Magnus Ekman             Sun Microsystems         USA

Pascal Felber                University of Neuchatel   Switzerland

Christof Fetzer               Dresden University of Technology
Germany

Matthew I. Frank            Univeristy of Illinois, Urbana-Chhampaign USA

Guang Gao                    University of Delaware    USA

Roberto Giorgi               University of Siena         Italy

Erik Hagersten               Uppsala University         Sweden

Mark Harris                   Nvidia    Australia

Jay P. Hoeflinger            Intel      USA

Haoquiang Jin                NASA Ames      USA

Stefanos Kaxiras           University of Patras        Greece

Mikel Lujan                    University of Manchester UK

Ami Marowka                Shenkar College of Engineering and Design
Israel

Avi Mendelson               Intel      USA

Dieter an Mey                RWTH, Aachen  Germany

Andre Seznec                IRISA    France

Peng Wu                       IBM Watson Research   USA

 

More details about the workshop is available at http://multiprog.ac.upc.edu/

 

 

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