[HiPEAC-announce] MICRO-41 Last Call for Papers

[Magklis, Grigorios]

(Apologies if you receive multiple copies of this message)

======================================================================
                           CALL FOR PAPERS
The 41st Annual IEEE/ACM International Symposium on Microarchitecture
                              (MICRO-41)
                         November 8-12, 2008
                           Lake Como, Italy

                   http://www.microarch.org/micro41

          Co-sponsored by IEEE-CS TC-uARCH and ACM SIGMICRO
======================================================================

The 41st International Symposium on Microarchitecture is the premier
forum for presenting, discussing, and debating innovative
microarchitecture ideas and techniques for advanced computing and
communication systems. This symposium brings together researchers in
fields related to microarchitecture, compilers, chips, and systems for
technical exchange on traditional microarchitecture topics and
emerging research areas. The MICRO community has enjoyed a close
interaction between academic researchers and industrial designers and
we aim to continue this tradition at MICRO-41. Papers are solicited in
fields including (but not limited to) the following:

* Architectures and designs for concurrency: superscalar, VLIW, data
  parallel, multithreaded, multicore, transactional, etc.
* Compiler techniques for instruction, thread, and memory-level
  parallelism
* Architectures and compilers for graphics/gaming, embedded
  processors, DSPs, ASIPs (network, multimedia, wireless, etc.)
* Dynamic optimization, emulation, and object code translation
* Software/hardware speculation and prediction schemes
* Low and ultra-low power designs, design efficiency optimizations
* Microarchitecture support for reliability, dependability, and
  security
* Microarchitecture modeling and simulation methodology
* Architectures for new computing paradigms/emerging technologies
* Measurement and analysis of real systems
* Novel memory and storage architectures
* Novel interconnection fabrics, NOCs, optical, etc.

Qualitative papers: In addition to traditional papers, authors are
encouraged to submit manuscripts with more forward-looking, bold,
and/or unconventional ideas (still within the scope of MICRO). Such
qualitative papers will be evaluated more on novelty, creativity, and
inherent value propositions, and less on implementation and
experimental evaluation. Nevertheless, they should provide some
indication as to the potential merits of the proposed ideas, such as
preliminary evaluations that extrapolate the potential. Both classes
of papers will be considered equally for inclusion based on overall
merit.

SUBMISSION DEADLINES: Paper abstracts are due on May 13, 2008. Final
paper submissions are due on May 20, 2008. All submissions will be
made electronically and no extensions will be granted. For more
information please consult the conference website.

Important Dates
===============
Abstract Submission Deadline: MAY 13, 2008
Full Paper Submission Deadline: MAY 20, 2008
Author Rebuttal Deadline: JULY 28
Author Notification Date: AUGUST 5, 2008

Committees
==========

General Co-Chairs
-----------------
Antonio Gonzalez, Intel and UPC
Cristina Silvano, Politecnico di Milano

Program Co-Chairs
-----------------
Paolo Faraboschi, HP Labs
Steve Keckler, UT Austin

Workshops and Tutorials Co-Chairs
---------------------------------
Koen De Bosschere, Universiteit Gent
Donald Yeung, University of Maryland

Program Committee
-----------------
Ali-Reza Adl-Tabatabai, Intel
David Albonesi, Cornell
Saman Amarasinghe, MIT
Todd Austin, Univ. of Michigan
David Bernstein, IBM
Rajeev Balasubramonian, Univ. of Utah
David Christie, AMD
Tom Conte, NC State
Al Davis, HP Labs and Univ. of Utah
Jim Dehnert, Google
Giuseppe Desoli, STMicroelectronics
Evelyn Duesterwald, IBM
Joel Emer, Intel and MIT
Babak Falsafi, EPFL
Glenn Farrall, Infineon
Krisztian Flautner, ARM
Kim Hazelwood, Univ. of Virginia
Bruce Jacob, Univ. of Maryland
Richard Lethin, Reservoir Labs and Yale
Geoff Lowney, Intel
Bill Mangione-Smith, Intellectual Ventures
Srilatha Manne, AMD
Diana Marculescu, CMU
Onur Mutlu, Microsoft
Sanjay Patel, UIUC
Yale Patt, UT Austin
Li-Shiuan Peh, Princeton
Ravi Rajwar, Intel
Alex Ramirez, BSC and UPC
Karu Sankaralingam, Univ. of Wisconsin
Yannakis Sazeides, Univ. of Cyprus
Tim Sherwood, UC Santa Barabara
Guri Sohi, Univ. of Wisconsin
Olivier Temam, INRIA
Sudhakar Yalamanchili, Georgia Tech
Cliff Young, D.E. Shaw Research

Finance Chair
-------------
William Fornaciari, Politecnico di Milano

Publicity Chair
-------------
Grigorios Magklis, Intel

Web Chair
---------
Carlos Molina, Univ. Rovira i Virgili

Local Arrangements Co-Chairs
----------------------------
Gianluca Palermo, Politecnico di Milano
Giovanni Agosta, Politecnico di Milano

Publications Co-Chairs
----------------------
Matteo Monchiero, HP Labs
Carlo Galuzzi, TU Delft

Paper Submissions Chair
-----------------------
Mark Gebhart, UT Austin

Registration Chair
------------------
Jordi Tubella, UPC

Student Advocate
----------------
Pedro Marcuello, Intel

Steering Committee
------------------
Richard Belgard, Consultant (Chair)
Bob Colwell, Consultant
Tom Conte, NC State
Kemal Ebcioglu, Global Supercomputing
Wen-mei Hwu, UIUC
Scott Mahlke, University of Michigan
Bill Mangione-Smith, Intellectual Ventures
Yale Patt, UT Austin
Eric Rotenberg, NC State
John Shen, Nokia
Guri Sohi, University of Wisconsin
Mateo Valero, UPC

For more information visit the MICRO-41 web site at
http://www.microarch.org/micro41

-----------------------------------------------------------
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