[HiPEAC-announce] CFP: 3rd Workshop on Dependable Architectures (in conjunction with MICRO-41 in Italy)

[Osman Unsal]

CALL FOR PAPERS WDA-3 2008

 

 

3rd Workshop on Dependable Architectures (extends previously held Workshop
on Architectural Reliability - WAR)

In conjunction with the 41st International Symposium on Microarchitecture
(MICRO-41)

Sunday, Nov. 9, 2008 Lake Como, Italy

 

WORKSHOP THEME:

 

Current computer technology trends present to the hardware and software
designer novel opportunities to improve performance and at the same time
many challenges to overcome. One of the formidable challenges is to provide
dependable operation - in terms of reliability and availability - for a
system made of unreliable components. The combination of various
developments brought dependability to prominence: soft-error rate is
projected to increase with scaling; variability due to non-deterministic
placement of dopant atoms and channel length is increasing design margins;
better than worst-case design techniques for power/performance require error
detection/correction; aggressive application of power-saving mechanisms such
as clock- and Vdd-gating are increasing voltage droops; the verification
manpower budget is becoming a significant part of the design effort; oxide
breakdown and electromigration are decreasing processor lifetimes. New
research frontiers are therefore open for exploration that will lead to the
discovery and development of dependable architectures, this includes
research at all design levels: circuit, architecture, compiler, OS and
network. This workshop aims to become a forum for academia and industry to
discuss and present ideas and recent developments in the design and
evaluation of dependable architectures both software and hardware.

 

Two kinds of papers are invited:

1. Technical papers (at least 6 pages) for relatively mature ideas.

2. Position papers (3 pages maximum) on directions for research and
development.

Please submit an electronic copy of your paper (in PDF) in two column format
with at least 10pt font. Submission instructions and other workshop related
information appear on the http://www. cs.ucy.ac.cy/carch/wda08.

The selected papers will be made available online. However, publication in
WDA does not preclude later publication at regular conferences or journals.

 

Topics of interest include but not limited to:

. Multi-core Dependability Challenges and Opportunities

. Compiler and Operating System Aware Dependability

. Dependable On-chip Interconnect and Routing

. Soft-error measurement, modeling and mitigation techniques

. Lifetime reliability

. Better than worst case design

. Dynamic verification techniques

. Approximate processing and reliability

. Process Variation Aware Design

. Techniques for reducing impact of variability:

- Temperature, Voltage droops, dI/dT, Crosstalk

. Fault-aware computing:

- Fault injection, detection, Error modeling, Fail-safe and fail-stop
systems, Time and space redundancy, dRedundancy/dEnergy (dR/dE) -efficient
architectures

. Compiler/architecture/OS synergistic techniques and interaction for
dependability

 

IMPORTANT DATES

 

. Paper due: September 8 (11.59PM PDT), 2008

. Notification: October 6, 2008

. Final paper due: October 13, 2008

 

CO-ORGANIZERS

 

Yanos Sazeides, University of Cyprus

Osman Unsal, Barcelona Supercomputing Center

Oguz Ergin, TOBB University of Economic and Technology

 

PROGRAM COMMITTEE

 

Todd Austin, University of Michigan

David Brooks, Harvard University

Veerle Desmet, Ghent University

Babak Falsafi, EPFL

David Kaeli, Northeastern University

C. Mani Krishna, UMass, Amherst

Shubu Mukherjee, Intel

Onur Mutlu, Microsoft

Jude Rivers, IBM

Xavi Vera, Intel

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