[HiPEAC-announce] CEA-EDF-INRIA Computer Science Summer School

[Pierre Michaud]

CEA-EDF-INRIA Computer Science Summer School
Petascale Computing: from chip to HPC center
June 9-20, 2008 - Centre Port-Royal, Saint-Lambert-des-Bois

http://www.inria.fr/actualites/colloques/cea-edf-inria/2008/petascale/index.en.html

For more than two decades High Performance Computing has been a major tool
for scientific simulation, which is essential for industrial design and
scientific research. The race towards more and more performance shows no
limit, from Cray machines of the early 80's with just a few Gigaflops, to
present time supercomputers reaching more than 100 TFlops. The next goal
is the mythic PFlops limit, which should be attained by 2010. However,
in order to reach such performance, massively parallel computers must
be used.  With computing nodes consisting of multicores, the overall
performance can be increased either by using more nodes, or by using more
cores per node.  How to reach PFlops? By increasing the number of cores,
adding some accelerators, increasing core performance?  How to get really
good performances from these architectures?  How to deal with a large
number of computing nodes?  The main objective of this summer school
is to address these questions and to acquaint scientific applications
developers and architects with the issues of petascale computing.
The school consists of three main lectures, hands-on sessions, and
several presentations.