[HiPEAC-announce] Deadline extension: Call for Book Chapter

[Haytham]

[Our apologies if you receive multiple copies of this email]

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This is a gentle reminder that the extended and final deadline for the 1-2
pages proposal (PDF) for a chapter in a new book titled "Networks-on-Chips:
Theory and Practice" is December 5th, 2007.

 

The book is going to be published by Taylor & Francis Group LLC - CRC Press.
Please visit http://www.ims.ece.uvic.ca/book.html for further details.

 

This book is written to address many challenging topics related to
Networks-on-Chip (NoC) research area. Starting with NoC architecture,
network design methodologies, topology optimization, mapping of applications
onto NoCs, network interface design, interconnection architecture, to
switches and Routers design which includes queue modeling, and arbitration
analysis.

 

The book also discusses NoC protocols at different layers of abstraction,
including analyzing and comparing different routing protocols, flow control
protocols, and congestion control protocols. The book also discusses the
impact of routing protocols on the network performance and proposes new
methodologies for performance evaluation.

 

Traffic modeling is one of the main issues that will be addressed in this
book. That includes developing different methodologies to extract real
traffic traces, proposing standard NoC-based traffic distributions to be
used by NoC community based on traffic Markovian models and open source

tools that generate application-specific traffic distribution graphs.

 

The book surveys and compares the work done to date in NoC quality of
service, testing and verification methodologies and proposes new fault
tolerance, error correction / detection techniques to improve the network
performance. The book also addresses new emerging issues such as security
requirements and overheads in NoC.

 

Finally, the book applies all proposed theoretical concepts into practical
real-time applications. Starting with design tools, hardware platforms,
synthesis, and mapping methodologies. The book answers many questions like
which languages should be used and based on what metrics can we choose our
target technology. Many implementation issues are also addressed through
case studies and examples such as physical design of interconnection
network, power and energy issues in NoC, and reconfigurable NoC Design.

 

 

Table of Contents: (Proposed Topics but not limited to)

 

1 - Introduction

2- NoC Architecture (Network Design Methodologies, Topology Optimization,
Mapping of applications onto NoCs, Network interface design, Interconnection
architecture)

3- Switch and Router Design (Switch Fabric, Queue Modeling, Router Types,
Arbitration)

4- Networks-on-Chip Protocols (Routing protocols, Flow Control Protocols,
Congestion Control Protocols)

5- Traffic Modeling (Real Traffic Traces, Towards Standardization of
NoC-based Traffic, Traffic Markovian Models, Application-specific Traffic
Generator, Traffic Distribution Graph)

6- NoC Quality of service (Guaranteed service and best effort, Connectivity
and reliability issues, Improving Network Throughput)

7- Testing and Verification (Fault Tolerance, Error correction / detection
techniques, Design for testability, Performance Evaluation)

8- NoC Design Tools (High Level Languages, Hardware Platforms, Synthesis,
Mapping, Placement, and Routing)

9- Security in NoC (Need for Security IPs, Design Methodologies, Security
Overheads)

10- NoC-based Implementations (NoCs for FPGAs and structured ASICs, Power
and energy issues in NoC, Reconfigurable NoC Design, O/S and RTOS for NoC,
Case Studies)

 

Contact:

 

Please make correspondence and chapter submissions to:

Prof. Fayez Gebali 

Email: ims at ece.uvic.ca

 

 

Thank you.

 

Sincerely,

 

Professor Fayez Gebali, Ph.D., P.Eng.

http://www.ece.uvic.ca/~fayez

(250) 721-8941

 

 

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