[HiPEAC-announce] 4th HiPEAC Industrial Workshop on Compilers and Architectures
Emre Ozer
Emre.Ozer at arm.com
Tue Aug 28 12:27:18 CEST 2007
Apologies if you receive multiple copies of this.
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Call for
Papers
4th HiPEAC Industrial
Workshop on Compilers and Architectures
November
26, 2007
Organized by ARM Ltd.
in Cambridge, UK
Venue location: Robinson
College, University of Cambridge
http://www.hipeac.net/industry_workshop4
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Modern embedded architectures face a number of new challenges that are
being introduced by technology limitations. Just a few of these
challenges include ways to continue Moore's law in spite of the
frequency wall, new methods to reduce power consumption and to maintain
circuit and system reliability due to technology scaling. Despite these
technology limitations, the embedded market still demands a continued
increase in performance, reduction in power consumption and circuit and
microarchitecture-level reliability. Most of today's new embedded
architectures introduce various types of parallelism to increase the
performance, including SIMD, SMT, SMP and multicore architectures. Some
of these high performance architectures are transparent to the end users
but requires the compiler to better utilize the new features. Other
directions rely on the users to guide the compiler and the system to
utilize new hardware features. New dialects of current programming
languages are needed and in some cases, new programming languages are
required. Power is also a major concern in embedded architectures,
particularly the mobile and wireless applications as well as in the
emerging ultra low-power markets such as medical and sensor network
applications. Most recently, reliability and fault tolerance has been
raised to be one of the most crucial topics in the core and SoC design
due to soft (i.e. transient) errors and increased circuit variability.
Hence, this workshop will focus on these exciting new directions, and
how they influence the embedded architectures and compilation domains.
This seminar is a continuation of the series of HiPEAC Industrial
Workshops.
The official language of the workshop is English.
Topics
The main focus of this workshop is advanced embedded computer
architecture and compiler technology. The topics of interest for this
workshop include, but are not limited to:
Modern embedded architectures
High-performance low-power architectures
Ultra Low Power Circuit and Microarchitecture Design Techniques
Reliability and Fault Tolerance
Symmetric/Asymmetric Multicore, multithreaded, superscalar, and VLIW
architectures
Reconfigurable and soft-core computing
Compilers and programming tools for modern embedded systems
Dynamic translation and optimization
Parallel programming and concurrency support for Multicore/multithreaded
systems
Performance tools for embedded systems
Non-traditional embedded computing systems topics
Important Dates
Deadline for submission October 1, 2007
Notification of paper acceptance November 1, 2007
Workshop gathering and presentations November 26, 2007
Submissions
Authors should submit their papers electronically to Emre Ozer at
emre.ozer at arm.com . Submissions must include an abstract. Please include
your postal address, email, phone and fax numbers. An early email with
your intention to submit a paper would be greatly appreciated. The
authors are free to provide related documents (technical report,
article) with additional details on their research work. The workshop
will not have proceedings (abstracts will be provided online from
http://www.hipeac.net/) so that the presentation of already published
work does not raise copyright issues. While this workshop is organized
by HiPEAC, submissions will be solely selected by researchers from ARM.
Please feel free to further distribute this invitation to students and
fellow researchers or developers.
Emre Ozer, Staff Engineer - R&D
ARM Ltd.
110 Fulbourn Road, Cambridge, CB1 9NJ, UK
e-mail: Emre.Ozer at arm.com
Work Phone: + 44 1223 406046
Fax: + 44 1223 400410
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