Advanced Hardware Cache Monitors and Their Application to Reconfigurable Cache Architectures


The University of Karlsruhe and the University of Edinburgh plan to establish a collaboration to investigate novel hardware-based cache monitors that can be applied in future chip-multiprocessor systems (CMP) with reconfigurable cache hierarchies. Modern processor and CMP architectures are increasingly dependent on the cache hierarchy to achieve good performance, but it has been noted that applications behave differently and place different requirements on the caches. Thus, it has been proposed that in order to maximize performance or power/energy consumption, future CMP systems could exploit cache implementations that allow for hardware reconfiguration of the cache hierarchy (e.g. varying associativity, line size, and/or access times). However, identifying opportunities for reconfiguration at run time requires timely and accurately monitoring the cache hit/miss behavior, including breaking down the types of misses and the data structures causing the misses. Unfortunately, current hardware cache monitors only provide very limited information about mostly global events like the total number of cache misses or the number of memory accesses. Hence, it is necessary to develop novel hardware cache monitors capable of obtaining the information required for such run-time cache reconfiguration.

The Computer Architecture and Parallel Processing (CAPP) group at the University of Karlsruhe has long being involved in the development of hardware monitors and related sofware visualization tools. Such experience provides an excellent base for the development of the proposed monitor scheme. Karlsruhe's contribution will then be on the design of the monitor itself. The Compiler and Architecture Design (CARD) group at the University of Edinburgh is currently investigating the implementation of reconfigurable cache hierarchies for CMP systems. This investigation is currently uncovering a series of requirements that must be addressed by monitor scheme in order to meet the performance and power/energy targets. Edinburgh's contribution will then be on the definition of the monitor requirements and on the definition of the monitor/reconfigurable cache interface.

 The goal of this collaboration and in particular of this initial cluster is to allow the researchers in both institutions to exchange their complementary expertise in the two topics described above and to flesh out an initial design for the complete monitor and reconfigurable cache systems. The outcome of the work we propose through this cluster is then an initial design of the complete system, but more importantly the exchange of expertise and the paving of a longer term collaboration path in this area.


Research cluster

Requested: € 7500
Granted: € 4000

Requested: € 0
Granted: € 0

The collaboration between Karlsruhe and Edinburgh will be established through a number of mutual visits of about two weeks duration after an initial meeting of the project leaders from both Universities. These fewer, but longer visits provide not only the opportunity to exchange and discuss ideas, but open up wider ranges of possibilities for an intensive and problem directed collaboration.

 We request resources for 5 visits of one to two weeks each, as follows: one visit by one of the project leaders, two visits by one Karlsruhe member to Edinburgh, and two visits by one Edinburgh member to Karlsruhe. The estimated cost of each two week long visit is 1,500 euros, for a total of 7,500 euros requested.


Requested: 24 month(s)
Granted: 12 month(s), starting on: Tue, January 1, 1980

CINTRA Marcelo (Edinburgh University) (--member--)
KARL Wolfgang (University of Karlsruhe) (--member--)

 Aris Efthymiou - Assistant Professor, University of Edinburgh
 Jie Tao - Research Associate, University of Karlsruhe
 Rainer Buchty- Research Associate, University of Karlsruhe