Reliability and fault tolerance techniques for predictable architectures

Affiliated to

Location

Timing

Description

Introduction:
Thales is a world leader in mission-critical information systems for defence and security, aerospace and transportation. The Embedded System Lab (ESL) at Thales Research and Technology elaborates and conducts research in computing architectures and programming tools to address Thales’ high performance and critical safety needs in embedded systems.
Description:
With the advent of 22nm technology nodes an below, architectures will be more and more exposed to errors due to process variation or transient faults (software errors). Many techniques to detect errors (physical or temporal redundancy, error correction codes, etc..) and to recover from these errors (forward or backward recovery) exists. However these techniques can impact the predictability of the architecture and highly increase of complexity of WCET (Worst Case Execution Time) analysis.
The object of this internship is to investigate the effect of error detection and recovery techniques on the predictability of the architectures and WCET analysis.
Required skills:
*PhD student in computer science, computer and/or electronic engineering.
*Mastering computer architectures and micro architectures.
*Good knowledge in parallel architectures and multicore architectures.
*Skills in C/C++ programming, program analysis and profiling.
*Knowledge in hard real time systems, WCET analysis is a plus.