Definition of a L1-data cache prefetch mechanism in a context of "many-core"

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Skills: Competence in computer science is required in particular in the domain of large multi processor systems as well as knowledge of C/C++/SystemC programming languages.

Description: In the context of a "many-core" in an embedded system, the PhD student will contribute to the definition of an efficient L1 Data-cache prefetch mechanism. He will also contribute to its performance analysis. Target applications are streaming applications with large data sets (low spacial locality) and they are very sensitive to both cost and power dissipation.