AMBA interconnect power analysis and modeling

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Description

The AMBA fabric is usually spread across the chip and includes long wires, which makes the estimation of it's power consumption problematic. The implementation and therefore the power consumption of an AMBA structure varies highly based on the SoC floor plan, therefore we can't assume that the power consumption of different implementations will be close. We want to analyse the power consumption of AMBA, which could lead to power aware floor plan optimisations. To do this, we need to model the power consumption of the AMBA interconnect in an SoC before implementation.

Project goals:

Analyse the implementation of AMBA in an ARM test chip.
Analyze possibility of breaking down complex AMBA structures to smaller, typical building blocks.
Propose a power model for AMBA.
Characterize building blocks according to the proposed power model.
Propose method to combine the characterised building blocks into real interconnect power models, based on the initial SoC floor plan.

Skills
The ideal candidate would have a good understanding of SoC design and experience using ASIC implementation tools.
Familiarity with scripting languages (Perl/Python).
Good knowledge in Verilog
Good knowledge in applied statistics