Power and performance modelling of highly scalable ARM designs

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Description

You will be working on a research project on to develop and utilize a simulation infrastructure for performance and power modeling multi-core ARM designs. Tasks may include working on models of devices and interconnect, evaluating the bandwidth and latency requirements for a class of applications, and determining the performance/power of different interconnects for classes of applications.

Requirements

• A keen and demonstrable interest in architecture, performance, and power modeling.
• PhD student in computer engineering or related fields. You should have achieved good results in both Computer Architecture and Operating Systems courses.
• Excellent programming skills are required including: a strong background in C++, and good knowledge of Python. Experience with ARM assembly and/or M5 simulation is advantageous.