HiPEAC'11 - The 6th Int. Conference on High-Performance and Embedded Architectures and Compilers - Heraklion, Crete, Greece
Submitted by kateveni on Sun, 24/01/2010 - 12:26
in
- static compiler optimization
- adaptive optimization
- low-power
- layout
- parallelization
- binary translation
- interconnects
- real-time
- compiler
- programming models
- reconfigurable computing
- area/footprint
- architecture
- customization
- ILP
- multi-core
- multi-thread
- parallel
- program
- reliability
- run-time system
- simulation and modeling
- system characteristics
- tools
- security
- memory system
- I/O subsystem
From 1st Jan 70
The 6th International Conference on High-Performance and Embedded Architectures and Compilers - Heraklion, Crete, Greece, 24-26 January 2011:
http://www.hipeac.net/hipeac2011