Extending a coprocessor for task scheduling to supports irregular dependencies patterns

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Description

Several demanding video applications (e.g. H.264 video decoding) rely on task dependency graphs that can be constructed from simple dependency pattern. Based on such kind of pattern, NXP has designed a coprocessor ( Hardware Task Scheduler “HTS”) that can quickly create, order, synchronize and map tasks to multiple cores.
The aim of this internship is to investigate the possibilities of extending this coprocessor to supports more irregular dependencies patterns such as loop carry dependencies.