Evaluation of the cost impact of a HDTV codec

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Description

The development of an HDTV video codec also involves the realization of a RTL implementation to determine for instance the cost impact. The focus of this internship is the realization of a video codec on the basis of a C-code reference model. The codec is based on kernels as used in state-of-the-art compression schemes and on novel quantization concepts. The emphasis of the video codec is its embedded usage, which demands for a low-cost implementation. The realization uses VHDL and a platform containing Xilinx programmable logic (FPGA).