Performance Counter-Based Power and Temperature Prediction
Submitted by Timothy Jones on Tue, 16/12/2008 - 18:23
Performance Counter-Based Power and Temperature Prediction
This project builds on performance counter-based power and temperature prediction work that is being performed in Cornell. The work consists of a validated the power prediction model for an AMD four-core Phenom and an Intel Core 2 Quad Q6600. The temperature model is being actively developed.
Proposed Work
The work for project has two directions
- Use of the continuous optimization system developed in Siena to see if we can leverage the information gathered from the performance counters
- The addition of similar performance counters to an ARM simulator to see if the approach works equally well for embedded systems
Participants
- Sally McKee (Chalmers)
- Sandro Bartolini (Siena)
- Timothy Jones (Edinburgh)
Groups:
Adaptive Compilation
Adaptive compilation
- Home page
- Kick-off Meeting
- Research Areas
- Call For Funding (Feb 2008)
- Context-Aware Optimization and Run-Time Adaptation of Sequential Libraries for Multi-Core Systems
- Barcelona Meeting (June 2008)
- Using Adaptive Compilation to Produce High Performance Sparse Computations
- Split Compilation and Code Specialization
- Split Vectorisation Using Gcc and Mono
- Value-Based Optimisation
- Performance Counter-Based Power and Temperature Prediction
- Paris Meeting (November 2008)
- Related Research Groups and Activities
- Paphos Meeting (January 2009)
- Munich Meeting (June 2009)
