Split Vectorisation Using Gcc and Mono

We would like to establish a collaboration among the following parters to stir research on split vectorization using GCC and Mono, passing static anaylsis results from an offline static compiler to an online/JIT tool.

Background

The current static toolchain of static languages suffers from major deficiencies, stemming from lack of information at pre-processing time. One of these deficiencies is lack of (detailed) information about the target platform, and its spedific simd capabilities. Split compilation is one direction that attempts to leverage machine-independent optimization as much as possible, deferring the machine-dependent part for when we know (more about) the actual target. (See "Split Compilation: an Application to Just-in-Time Vectorization", P. Lesnicki et al., GREPS PACT Workshop 2007). Another relevant reference on Liquid SIMD: Abstracting SIMD Hardware Using Lightweight Dynamic Mapping , HPCA 2007.

Partners

• INRIA Saclay (Albert Cohen) and Rennes (Erven Rohou)
• IBM Haifa (Ayal Zaks)
• Embedded Systems Lab, Thales Research & Technology (Sami Yehia)

Sami's Research Interests

The Embedded System Lab at Thales Research and Technology study performance embedded systems in the domains of aerospace, defense and security. Typically we address both signal processing applications like radar, sonar and electronic warfare and image processing like in video surveillance, motion detection and pattern (facial/intruder) recognition applications. Because of the nature of the domains (defense/aerospace), those systems are most of the time subject to high performance, huge data processing and hard real time constraints.


Current research

My current research work address the following issues:

• Customization in mutlicore architecture (in cooperation with INRIA/ALCHEMY): Specialization brings new challenge in parallelization because of its heterogeneous nature. Our research strives to bring multipurpose/multi-faceted solutions for cost effective specialization in parallel architectures.

• Programmable accelerators: Looking for patterns of acceleration and adequacy of current SIMD and accelerator architectures to those patterns.

• Application and benchmarking: since our architectures basically addresses specific domains we want to put together representative benchmarks in these domain (mainly signal and image processing) to allow better characterized research in parallel processing as well as customization.


Interests in this cooperation

The embedded systems lab relies on both proprietary SIMD accelerators and existing parallel architectures that may lack of vectorizing compilers to the target. Also small changes in the SIMD architecture may require rewriting of Assembly code or full compiler tool chain. Our aim in this cooperation is to investigate the use of split compilation for the SIMD architectures we develop and have a platform independent SIMD compiling environment.

Relevant publications

• Nathan Clark, Amir Hormati, Scott Mahlke, Sami Yehia, and Krisztian Flautner, Liquid SIMD: Abstracting SIMD Hardware Using Lightweight Dynamic Mapping, International Symposium on High-Performance Computer Architecture (HPCA), February 2007