Industrial workshop (Paris): Program

9:15-9:30	Opening: Gilbert Edelin
9:30-10:15	Keynote: Multicores make our lives harder. *Eric lenormand & Philippe Bonnot*
10:15-11:05	Session 1: Real time and fault tolerant architectures
	Mitigating the Performance Degradation due to Faults in Non-Architectural Structures, by Constantinos Kourouyiannis, Yiannakis Sazeides and Veerle Desmet.
	Schedulability of Real-Time Fault-Tolerant Systems Using Multi-cores, by Risat Mahmud Pathan, Jan Jonsson and Johan Karlsson.
11:05-11:35	Coffee Break
11:35-12:50	Session 2: Multicores and memory architectures
	A run-time configurable cache/scratchpad memory with virtualized user-level RDMA capability, by George Nikiforos, George Kalokairinos, Vassilis Papaefstathiou, Stamatis Kavadias, Dionisis Pnevmatikatos and Manolis Katevenis.
	Power-Efficient Scaling of CMP Directory Coherence, by Stefanos Kaxiras, Georgios Keramidas, Ioannis Oikonomou and Athanasios Tollos.
	Dynamic System-Level Optimization in MulticoreArchitectures: The Example of Hardware Task Allocation, by T. Theocharides, M. K. Michael, M. Polycarpou and A. Dingankar.
13:00-14:30	Lunch
14:30-15:15	Keynote: Can we afford customization? *Fabrice Lemonnier & Sami Yehia*
15:15-16:05	Session 3: Customization and Application partitioning
	Early Evaluation of Predictive Code Scheduling for Heterogeneous Architectures, by Víctor J. Jiménez, Lluís Vilanova, Isaac Gelado, Marisa Gil, Grigori Fursin and Nacho Navarro.
	Sub-Algorithms: Suitable Entities for Execution on Co-processors, by Sean Rul, Hans Vandierendonck and Koen De Bosschere
16:05-16:30	Coffee Break
16:30-17:45	Session 4: Methodology and tools
	Opening Up Automatic Structural Design-Space Exploration by Fixing Modular Simulation, by Veerle Desmet, Sylvain Girbal and Olivier Temam.
	Development of a Virtual Platform using the ‘Chumby’ Device as Case Study, by Stefan Kraemer, Xiaowei Pan and Rainer Leupers.
	Analyzing scalability limits of H.264 decoding due to TLP overhead, by Mauricio Alvarez, Arnaldo Azevedo, Cor Meenderinck, Ben Juurlink, Andrei Terechko, Jan Hoogerbrugge and Alex Ramirez.

Keynotes:

Keynote 1:Multicores make our lives harder
Eric Lenormand, Philippe Bonnot

In its wide range of mission critical embedded systems in the areas of aerospace, defense and security, and in particular in computation intensive domains close to the sensors, Thales has many requirements on computing architectures and design tools. While the advent of multi-cores offers a lot of opportunities in term of efficiency and performance, it exacerbates some problems that were already pending with single core architectures. Examples are real-time predictability, dependability, and industrial software design process. This talk will provide an overview of the different applications in the domain, the constraints we are facing as well as the tools and architectures we develop or use in the domain.

Keynote 2:Can we afford customization?
Fabrice Lemonnier, Sami Yehia

Beside parallelism, specialization and customization of processors are another path to more efficiency and performance. Looking at the spectrum that covers, on one extreme, the very efficient but expensive ASICs to highly programmable accelerators, where general-purpose processors reside at the other extreme, a right balance is to be found. This talk will cover different points of this flexibility/efficiency spectrum through different solutions and research in this area.