Research profiles
RWTH Aachen University
Institute for Integrated Signal Processing Systems
People: Prof. Rainer Leupers, Stefan Kraemer, Jeronimo Castrillon
Web: http://www.iss.rwth-aachen.de/
Research interests:
- MPSoC modeling and performance estimation
- MPSoC simulation and virtual platforms
- Parallelizing compilers for heterogeneous MPSoC
- ASIP design methodology and tools
- Instruction-set extensions, reconfigurable ASIPs
- C/C++ Compilers for embedded processors
Tools and course offerings:
- Application specific MPSoC design methodologies
- ASIP design based on LISATek/CoWare Processor Designer
- Profiling and processor customization
- Retargetable compilation
- LANCE C compiler platform: http://www.lancecompiler.com/
INRIA-Lille France
DART Project: contributions of the DAta parallelism to Real Time
http://www.inria.fr/lille/scientific-research/research-teams/DART_page/view?set_language=en
Prof: J.L.dekeyser, P.Boulet, S.Niar, S.Meflati, P.Marquet
Research interests:
- MPSoC modeling, performance and power consumption estimation
- MPSoC simulation: SystemC-TLM
- Reconfigurable MPSoC for automotive applications
- MDE approach
Tensilica, Santa Clara, California, USA
People: Grant Martin, Chief Scientist
Web: www.tensilica.com
Research Interests:
- Configurable, extensible processors (ASIPs)
- Applications of ASIPS from embedded systems through to supercomputing
- MPSoC architectures
- Multiprocessor programming models and mapping of applications to multiprocessors
- ESL, System modelling, SystemC, TLM
Thales Research & Technology, France
People: Sami Yehia
Research interest:
The Embedded System Lab at Thales Research and Technology study performance embedded systems in the domains of aerospace, defense and security. Typically we address both signal processing applications like radar, sonar and electronic warfare and image processing like in video surveillance, motion detection and pattern (facial/intruder) recognition applications. Because of the nature of the domains (defense/aerospace), those systems are most of the time subject to high performance, huge data processing and hard real time constraints.
Our current research work address the following issues:
- Customization in mutlicore architecture (in cooperation with INRIA/ALCHEMY): Specialization brings new challenge in parallelization because of its heterogeneous nature. Our research strives to bring multipurpose/multi-faceted solutions for cost effective specialization in parallel architectures.
- Application and benchmarking: since our architectures basically addresses specific domains we want to put together representative benchmarks in these domain (mainly signal and image processing) to allow better characterized research in parallel processing as well as customization.
- The SPEAR Design environment, developed at Thales research and Technology offers a graphical environment to map and data streaming applications to parallel application. The tools allow to graphically modeling the application, the architecture, map and schedule parallel tasks on the processing elements. Spear generates parallel code as well as performance simulator.
- Simulation and prototyping using FPGA.
Infineon Technologies
People: Dr. Xiaoning Nie
Research interests:
- MPSoC modeling and virtual prototyping
- Multicore, bus and memory architecture
- Exploration and optimization for area, power and smart flexibility
- ASIP applications in Modem, Multimedia and Protocol Processing
- Instruction-set design and verification
- Multicore tool chain generation e.g. using LisaTek technology
Tampere University of Technology
Department of Computer Systems
People: Prof. Jarmo Takala, Dr. Pertti Kellomäki, Pekka Jääskeläinen,
Vladimir Guzma.
WEB: http://tce.cs.tut.fi
Research interests:
- application specific processors, ASIP design methodology
- Transport Triggered Architecture (TTA)
- hardware/software codesign
- embedded and ASIP compiler technology
- low power and mobile applications
- multimedia acceleration
University of Las Palmas GC, Spain
IUMA, Institute for Applied Microelectronics
People: Prof. A. Nunez, Prof. J.A. Montiel, Dr. T. Bautista, Dr. G. M. Callicó, P.P. Carballo, Dr. J. Sosa, Dr. H. Navarro
WEB: http://www.iuma.ulpgc.es
See also Hipeac January 31st presentation slides, attached below
Research interests:
- MPSoC, CMP-Heterogeneous modeling and verification
- MPSoC performance and power consumption estimation
- MPSoC for GNSS (Global Navigation), Wireless and Multimedia application domains
- MPSoC simulation and emulation platforms, virtual platforms
- ASIP design methodology and tools
- Embedded and ASIP compiler technology
- Source code performance estimation per template target platform
- Instruction-set extensions, reconfigurable ASIPs
- C/C++ Compilers for embedded processors
Tools and course offerings:
- Mentor VSTATION PRO Emulation Platform
- IC Tester HP8300 F660, and Thermonics 2420
- Tool: CASSE SystemC Library and Simulation Environment
- Course: CoWare Platform Architect and IP Libraries
University of Edinburgh
Institute for Computing Systems Architecture
People: Prof. Nigel Topham, Prof. Michael O'Boyle, Dr. Bjoern Franke
Web: http://www.icsa.inf.ed.ac.uk/
Research Interests:
- Design Tools for Extensible Processors
- Adaptive Compilation
- Compilation for ASIPs
- Fast Instruction Set Simulation
- Extraction of coarse-grain parallelism from sequential applications
- HW/SW Co-Design Space Exploration
University of Bologna
DEIS - Micrellab
People: Prof. Luca Benini, Martino Ruggiero, Andrea Marongiu
Web: http://www-micrel.deis.unibo.it
Research Interests:
- MPSoC modeling, performance and power consumption estimation
- MPSoC simulation and virtual platforms
- MPSoC programming models
- MPSoC static and dynamic resource management optimization
- MPSoC mapping of applications to multiprocessors
- MPSoC hardware/software codesign
University Kaiserlautern
Microelectronic Design Research Group
People: Prof. Nobert Wehn, Matthias Alles, Matthias May, Christian Brehm
Web: http://www.eit.uni-kl.de/wehn
Research Interests:
- ASIP design for wireless communications
- ASIP design methodologies
- Reconfigurable ASIPs
- MPSoC architectures
- MPSOC mapping of applications to multiprocessors
- MPSOC programming models
- MPSOC reliability
IMEC
MPSoC and Design Tools Group
People: Tom Ashby
Web: http://www.imec.be
Research interests:
- Parallelisation of C code for MPSoC platforms
- Tool support for automatic management of scratchpad memory
- Program modeling and analysis
- Mapping of multimedia and wireless applications to embedded plaforms
Tools and course offerings:
- MPSoC mapping and parallelisation, with state-of-the-art tool support
- Tools for parallelisation and scratchpad management
University of Lugano, Switzerland
ALaRI Institute
People: Umberto Bondi, Prof. Mariagiovanna Sami
Web: http://www.alari.ch
Research interests:
- Design space exploration of MPSoC architectures for multimedia applications
- High-level methodologies to support choice of NoC topology and applications mapping into nodes
- Automated synthesis of HW/SW interfaces and HW/SW partitioning of RTOS
- High level simulation toolchain and power modelling
- Design of accelerators and ISA extension for cryptography
| Attachment | Size |
|---|---|
| ISS-RWTH-Aachen.pdf | 1.62 MB |
| Dart_DesignMethodCluster.ppt | 484.5 KB |
| IumaUlpgcEDAclusterProfile.ppt | 2.29 MB |
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