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Transactions on HiPEAC: Volume 2, Issue 3
Aneesh Aggarwal,
Complexity Effective Bypass Networks.
Transactions on High-Performance Embedded Architectures and Compilers, 2(3):89-108, 2007.
[article]
Christine Rochange and Pascal Sainrat,
A Context-Parameterized Model for Static Analysis of Execution Times.
Transactions on High-Performance Embedded Architectures and Compilers, 2(3):109-128, 2007.
[article]
Amit Golander and Shlomo Weiss,
Reexecution and Selective Reuse in Checkpoint Processors.
Transactions on High-Performance Embedded Architectures and Compilers, 2(3):129-152, 2007.
[article]
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