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X-WR-CALNAME:HiPEAC |  25 2009- February 24 2009
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BEGIN:VEVENT
DTSTAMP;VALUE=DATE-TIME:20120524T121239Z
DTSTART;VALUE=DATE-TIME:20090124T230000Z
DTEND;VALUE=DATE-TIME:20020203
UID:http://www.hipeac.net/content/tutorial-architecture-design-soft-errors
URL;VALUE=URI:http://www.hipeac.net/content/tutorial-architecture-design-soft-errors
SUMMARY:Tutorial on Architecture Design for Soft Errors
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 <i><b>by <a href=\\"http\://www.intel.com/pressroom/kits/bios/jemer.htm\\">Joel Emer</a>\, <a href=\\"http\://pages.cs.wisc.edu/~shubu/\\">Shubu Mukherjee</a>\, Intel Corporation</b></i>
 <br/>
 <br/>
 <i>Held in conjunction with\:</i> <b>the 4th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC)</b>
 <br/>
 <b>Sunday January 25 Paphos\, CYPRUS</b>
 <br/>
 <br/>
 <p>As kids many of us were fascinated by black holes and solar flares in
 
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DTSTAMP;VALUE=DATE-TIME:20120524T121239Z
DTSTART;VALUE=DATE-TIME:20090124T230000Z
DTEND;VALUE=DATE-TIME:20020203
UID:http://www.hipeac.net/content/wrc-2009-3rd-hipeac-workshop-reconfigurable-computing
URL;VALUE=URI:http://www.hipeac.net/content/wrc-2009-3rd-hipeac-workshop-reconfigurable-computing
SUMMARY:WRC 2009\: 3rd HiPEAC Workshop on Reconfigurable Computing
DESCRIPTION:<p>3rd HiPEAC Workshop on<br />
                         Reconfigurable Computing<br />
                               (WRC 2009)</p>
 
 <p>January 25\, 2009\, Paphos\, CYPRUS</p>
 
 <p><a href=\\"http\://ce.et.tudelft.nl/HiPEACRC_WS/\\">http\://ce.et.tudelft.nl/HiPEACRC_WS/</a></p>
 
 <p>(this workshop is organized in the framework of the 2009 International<br />
 Conference on High Performance Embedded Architectures &amp\; Compilers HiPEAC<br />
 2009)</p>
 
 <p><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong><strong></strong></p>
 
 
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DTSTAMP;VALUE=DATE-TIME:20120524T121239Z
DTSTART;VALUE=DATE-TIME:20090124T230000Z
DTEND;VALUE=DATE-TIME:20090125T163000Z
UID:http://www.hipeac.net/smart-workshop.html
URL;VALUE=URI:http://www.hipeac.net/smart-workshop.html
SUMMARY:SMART'09\: 3rd Workshop on Statistical and Machine learning approaches to ARchitectures and compilaTion
DESCRIPTION:  <table width=\\"100%\\" border=\\"0\\">
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       <td>
         <table width=\\"100%\\" border=\\"0\\">
           <tr width=\\"100%\\">
             <td width=\\"25%\\" align=\\"right\\"><img width=\\"187\\" height=\\"108\\" src=\\"http\://www.hipeac.net/system/files?file=smart-workshop1_clip_image002_0.gif\\"></td>
             <td width=\\"50%\\">
               <p align=\\"center\\"><em>January 25\, 2009<br>
                 Paphos\, Cyprus<br>
                 (co-located with HiPEAC 2009 Conference)</em>
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BEGIN:VEVENT
DTSTAMP;VALUE=DATE-TIME:20120524T121239Z
DTSTART;VALUE=DATE-TIME:20090125T073000Z
DTEND;VALUE=DATE-TIME:20090125T120000Z
UID:http://www.hipeac.net/content/gcc-research-opportunities-workshop-grow09
URL;VALUE=URI:http://www.hipeac.net/content/gcc-research-opportunities-workshop-grow09
SUMMARY:GCC Research Opportunities Workshop (GROW09)
DESCRIPTION:<p><strong>First International Workshop on<br />
 GCC Research Opportunities<br />
 (GROW09)</strong></p>
 
 <p><a href=\\"http\://www.doc.ic.ac.uk/~phjk/GROW09/\\">http\://www.doc.ic.ac.uk/~phjk/GROW09/</a></p>
 
 <p>Held in conjunction with\:<br />
 the 4th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC)<br />
 Paphos\, CYPRUS\, January 25-28\, 2009</p>
 
 
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BEGIN:VEVENT
DTSTAMP;VALUE=DATE-TIME:20120524T121239Z
DTSTART;VALUE=DATE-TIME:20090130T090000Z
DTEND;VALUE=DATE-TIME:20090130T100000Z
UID:http://www.hipeac.net/content/cotson-infrastructure-system-level-simulation
URL;VALUE=URI:http://www.hipeac.net/content/cotson-infrastructure-system-level-simulation
SUMMARY:COTSon\: Infrastructure for system-level simulation
DESCRIPTION:<p>BSC-DAC-UPC invite you to attend online the following talk\:</p>
 
 <p>Title\: COTSon\: Infrastructure for system-level simulation<br />
   Speakers\: Ayose Falcón - Daniel Ortega (HP Labs\, Barcelona)<br />
       Date\: Fri 30\, 10\:00 (CET)<br />
        URL\: <a href=\\"http\://www.ac.upc.edu/video/index\,en.html\\">http\://www.ac.upc.edu/video/index\,en.html</a></p>
 
 <p>Abstract</p>
 
 <p>HP Labs' COTSon simulator based on AMD's SimNow is a full system simulation<br />
 infrastructure. It allows to simulate complete systems ranging from multicore<br />
 nodes up to full clusters of multicore nodes with complete network simulation.</p>
 
 
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