Exploiting Silicon Photonics for energy-efficient heterogeneous parallel architectures

Workshop/Tutorial Info
SiPhotonics
Event Date: 
Tue, 01/21/2014 - 14:00 to 18:00

 

 

 

Exploiting Silicon Photonics for energy-efficient heterogeneous parallel architectures (SiPhotonics'14)

Tuesday January 21, Time: 14,00-18,00, Room: Saloon I

The main purpose of this workshop is to promote further research interests and activities on Silicon Photonics and related topics in the perspective of its adoption in future computer systems. In fact Silicon Photonics poses in itself crucial challenges and interesting design tradeoffs for being deployed in future computer systems effectively, also in integration with other technologies. Furthermore, the unique features of photonics (e.g. extreme low-latency, end-to-end transmission, high bandwidth density) have the potential to constitute a discontinuity element able to modify the expected shape of future computer systems from the design point of view and also from the programmability and/or runtime management perspectives.
 

Programme – Tuesday January 21

The workshop programme consists of a series of invited papers that cover a complete range of perspectives, from raw technology issues and solutions up to studies at the overall system level of modern multi-/many core systems, both from academic and industrial researchers working in this area.

 

Session I: Design from physical opportunities and constraints up to architecture

Physical Layer Analysis and Modeling of Silicon Photonic WDM Bus Architectures  R. Hendry, D. Nikolova, S. Rumley, N. Ophir, K. Bergman,  Columbia University, USA

Optical Crossbars on Chip, a comparative study based on worst-case propagation losses. H. Li*, S. Le Beux*, G. Nicolescu#, J. Trajkovic+ and  I. O’Connor*,  * Lyon Institute of Nanotechnology - Ecole Centrale de Lyon, France, + Concordia University, Canada, # Ecole Polytechnique de Montréal, Canada

Capturing Sensitivity of Optical Network Quality Metrics to its Network Interface Parameters  M. Ortin Obon*, L. Ramini+, V. Viñals*, D. Bertozzi+, * University of Zaragoza, SP, + University of Ferrara, IT

Silicon Photonics and how to actually make use of it in larger systems, J. Hofrichter, A. La Porta, I.M. Soganci, F. Horst, R. Dangel, and B.J. Offrein. Photonics Group, IBM Research – Zurich

Photonic devices and methodologies enabling photonic network-on-chip based architectures  G. Calò*, G. Bellanca+, A. Parini#, V. Petruzzelli*, * Politecnico di Bari, IT, + Università di Ferrara, IT, # Laboratory of MIST E-R, IT

The Power of Circuit Simulations for Designing Photonic Integrated Circuits. C. Arellano*, S. Mingaleev+, E. Sokolov+, A. Richter*, * VPIphotonics, DE, + VPI-minks, BLR

 

Session II: Design from architecture downto physical opportunities and constraints

3D HELIX: Design and Synthesis of Hybrid Nanophotonic Application-Specific 3D Network-On-Chip Architectures S. Bahirat, S. Pasricha, Colorado State University, USA

Dynamic Management Policies for Exploiting Hybrid Photonic-Electronic NoCs A. García-Guirado*, R. Fernández-Pascual*, J.M. García*, S. Bartolini+, * Universidad de Murcia, SP, + Università di Siena, IT

Towards Zero Latency Photonic Switching in Shared Memory Networks  A. Van Laer*, M. Ridwan Madarbux*, P.M. Watts*, T.M. Jones+, * University College London, GB, + University of Cambridge, GB

Fast path-setup in reconfigurable optical networks for tiled CMPs. P. Grani, S. Bartolini, Università di Siena, IT

Targeting Self-Organizing Memory Management in Future Silicon Photonics System Architectures. Oliver Mattes, Wolfgang Karl, Institute of Computer Science & Engineering (ITEC) and  Karlsruhe Institute of Technology (KIT)

 

Duration:

Half day tutorial.

Co-chairs:

José M. García, University of Murcia, Spain.

Sandro Bartolini, University of Siena, Italy

Program committee:

Keren  Bergman                           Columbia University

Giovanna Calo'                            Politecnico di Bari

José M. Cecilia                            Catholic University of Murcia

Yawen  Chen                                 Otago University

Guido Chiaretti                             ST Microelectronics

Sylvain  Collange                          INRIA/IRISA

Ricardo Fernández-Pascual         University of Murcia

Paolo  Grani                                 University of Siena

Timothy  Jones                            University of Cambridge

Wolfgang  Karl                              Karlsruhe Institute of Technology (KIT)

Kostas  Katrinis                           IBM

Sébastien  Le Beux                      Lyon Institute of Nanotechnology (INL)

Oliver  Mattes                               Karlsruhe Institute of Technology (KIT)

Gokhan  Memik                            Northwestern University

Sergei   Mingaleev                        VPIphotonics

Takahiro Nakamura                     Photonics Electronics Technology Research Association

Lasse  Natvig                               Norwegian University of Science and Technology

Sudeep  Pasricha                        Colorado State University

Luca  Ramini                                University of Ferrara

Marco Romagnoli                         CNIT

Laurent  Schares                          IBM TJ Watson

Yvain Thonnart                             CEA-Leti

 

Contacts:

Prof. José M. García

Departamento de Ingeniería y Tecnología de Computadores

University of Murcia, Spain.

email: jmgarcia[at]ditec.um.es

Tel.: +34 868 884819     Fax: +34 868 884151

 

Ing. Sandro Bartolini, PhD

Dipartimento di Ingegneria dell'Informazione e Scienze Matematiche

University of Siena, Italy

E-mail: bartolini[at]dii.unisi.it

Tel: +39 0577 234850    Fax: +39 0577 233609