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HiPEAC 2010
International conference on High-Performance
Embedded Architectures and Compilers
January 25-27, 2010
Pisa, Italy
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HiPEAC 2010

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For more info about the conference: hipeac2010@hipeac.net

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HiPEAC 2010: Workshops and Tutorials

Workshops and tutorials will be held on Saturday 23 and Sunday 24 january (2 days)

Workshops list

  • Workshop on Reconfigurable Computing (WRC)
  • Workshop on Statistical and Machine learning approaches to ARchitecture and compilaTion (SMART)
  • Interconnection Network Architectures: On-Chip, Multi-Chip (INA-OCMC)
  • Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG)
  • GCC Research Opportunities Workshop (GROW)
  • Workshop on Rapid Simulation & Performance Evaluation: Methods and Tools (RAPIDO)
  • Workshop on the Design for Reliability (DFR)
  • Workshop on Computer Architecture and Operating System co-design (CAOS)

Tutorial list

  • Networks-on-chip: the New Frontier for Interconnection Networks
  • Teaching Introductory Computer Architecture and Programming: What, When, How?
  • Adaptability: the Key for Future Embedded Systems
  • Speedup-Test: Towards Statistical Methodology to Evaluate Program Speedups and their Optimisation Techniques
  • Programming FPGA-Based Accelerators using ROCCC 2.0
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