16 workshops will be held in conjunction with HiPEAC 2012.
The conference and all associated events will take place at Eurosites George V, located in the famous "Triangle d'Or" business district next to the Champs Elysées.
Please see the workshop list below with URLs for detailed information.
Workshops with open calls for papers (sorted by submission deadline)
- Interconnection Network Architecture: On-Chip, Multi-Chip (INA-OCMC)
- extended DL: October 14
- Programmability Issues for Heterogeneous Multicores (MULTIPROG-2012)
- extended DL: October 15
- High-level programming for heterogeneous and hierarchical parallel systems (HLPGPU)
- October 24
- Workshop on Computer Architecture and Operating System Co-design
- October 21 (abstract)
- October 28 (full paper)
- Extreme Scale Parallel Architectures and Systems (ESPAS 2012)
- Workshop on Design for Reliability
- October 31
- Dynamic Compilation Everywhere
- RAPIDO'12 - 4th Workshop on: Rapid Simulation and Performance Evaluation: Methods and Tools
- November 7
- Workshop on Feedback-Directed Compiler Optimization for Multicore Architectures (FD-COMA 2012)
- Workshop on Reconfigurable Computing
- EXTENDED SUBMISSION DEADLINE: Monday, Nov. 14th
- IMPACT 2012 - 2nd International Workshop on Polyhedral Compilation Techniques
- November 14
Workshops without call for papers
- Joint ENCORE & PEPPHER Workshop on Programmability and Portability for Emerging Architectures (EPoPPEA)
- Apple-CORE Project - Making Multi-core Mainstream
- A cross-domain approach for mixed-criticality integration based on heterogeneous MPSoCs
- Workshop on Design Tools and Architectures for Multi-Core Embedded Computing Platforms
- The Open GPU project
- CASTNESS workshop - Thursday January 26
- Presentations from the 4 FET Teradevice Computing (TERACOMP) projects.
- The CASTNESS workshop is co-located with the HiPEAC conference, but remains an independent event. Registration is free for the members of the TERACOMP European projects, and 50 euros for external participants (e.g., HiPEAC conference participants). Registration is mandatory.
HiPEAC is committed to help changing the culture of scientific publication in the computer systems area by launching a journal-first publication model. Close to 120 papers have been submitted to the ACM TACO Special Issue on "High-Performance and Embedded Architectures and Compilers". Many of these papers are currently under revision. Accepted papers will be presented in the main conference track, in parallel with a number of scientific, training and networking events (industry exhibit, European project posters, student posters). This rich program will provide an unmatched forum in computer architecture and compilation for high-performance and embedded systems.