Conference program

Workshops & Tutorials

Saturday, 22 January 2011 - Workshops & Tutorials (at Galaxy Hotel)

08:00 - 12:30Registration for the Workshops & Tutorials
08:45 - 18:00RAPIDO'11 Workshop
09:00 - 17:00PEPPHER Workshop
09:00 - 12:30CAOS'11: Second Workshop on Computer Architecture and Operating System Co-Design
09:00 - 16:30OpenCL Heterogeneous Computing Tutorial
10:30 - 11:00Coffee Break
12:30 - 14:00Lunch
15:30 - 16:00Coffee Break
  

Sunday, 23 January 2011 - Workshops & Tutorials (at Galaxy Hotel)

08:00 - 12:30Registration for the Workshops & Tutorials
08:45 - 17:30MULTIPROG'11: 4th Workshop on Programmability Issues for Multicore Computers
09:15 - 17:00INA-OCMC'11: Workshop on Interconnection Network Architectures: On-Chip, Multi-chip
09:30 - 17:30

WRC'11: 5th Workshop on Reconfigurable Computing

11:00 - 18:00DFR'11: 3rd Workshop on Design for Reliability
14:00 - 17:30

Tutorial on ILDJIT: a compilation framework for program introspection, optimization and micro-architectural design

10:30 - 11:00

Coffee Break

12:30 - 14:00

Lunch

15:30 - 16:00Coffee Break
 

Conference program

Sunday, 23 January 2011 (at Galaxy Hotel)

18:00 - 21:00

Registration for the Conference

19:00 - 21:00

Welcome Cocktail

 

Monday, 24 January 2011 - Conference (at FORTH building, G.Lianis Amphitheater)

08:30 sharp

Conference buses depart from (1) Heraklion Center and (2) Galaxy Hotel, as described in the Local Info page, towards FORTH building

09:00 - 09:15

Opening and Welcome Remarks

09:15 - 10:30

Keynote I - Antonio Gonzalez, Intel & UPC - Moore’s Law Implications on Energy Reduction

10:30 - 11:00

Coffee Break

11:00 - 12:30

Session I: Parallelization & Run-Time Systems - Sami Yehia, Chair

  • A Stream-Computing Extension to OpenMP
    Antoniu Pop (MINES ParisTech), Albert Cohen (INRIA)
  • GLOpenCL: OpenCL Support on Hardware- and Software-Managed Cache Multicores
    Konstantis Daloukas, Christos Antonopoulos, Nikolaos Bellas (University of Thessaly)
  • DDM-VMc:The Data Driven Multithreading Virtual Machine for the Cell Processor
    Samer Arandi, Paraskevas Evripidou (University of Cyprus)
12:30 - 14:00Lunch
14:00 - 15:30

Session II: Compilers - Ayal Zaks, Chair

  • Speculatively Vectorized Bytecode
    Erven Rohou, Kevin Williams, Albert Cohen (INRIA), Sergei Dyshel, Dorit Nuzman, Ira Rosen, Ayal Zaks (IBM Haifa Research Lab)
  • Parallel Points-to Analysis for Multi-Core Machines
    Marcus Edvinsson, Jonas Lundberg, Welf Löwe (Linnaeus University)
  • TypeCastor: Demystify Dynamic Typing of JavaScript Applications
    Shisheng Li, Buqi Cheng, Xiao-Feng Li (Intel Corporation)
15:30 - 16:00Coffee Break
16:00 - 18:00

Session III: Memory Systems; Real-time Systems - Babak Falsafi, Chair

  • Extended Histories: Improving Regularity and Performance in Correlation Prefetchers
    Manikantan R., Govindarajan R. (Indian Institute of Science), Kaushik Rajan (Microsoft Research India)
  • Decoupled Zero-Compressed Memory
    Julien Dusser, André Seznec (INRIA / IRISA)
  • High Throughput Data Redundancy Removal Algorithm with Scalable Performance
    Ankur Narang, Souvik Bhattacherjee, Vikas Garg (IBM Research, India)
  • RVC: A Mechanism for Time-Analyzable Real-Time Processors with Faulty Caches
    Jaume Abella, Eduardo Quiñones (BSC-CNS), Francisco Cazorla (BSC-CNS and IIIA-CSIC), Yanos Sazeides (University of Cyprus), Mateo Valero (BSC-CNS and UPC)
18:00 - 18:10HiPEAC’12 presentation
18:20Buses return from FORTH building to Heraklion Center and to Galaxy Hotel (18:50)
 

Tuesday, 25 January 2011 - Conference (at FORTH building, G.Lianis Amphitheater)

08:30 sharpConference buses depart from (1) Heraklion Center and (2) Galaxy Hotel, as described in the Local Info page, towards FORTH building
09:00 - 10:15Keynote II - Saman Amarasinghe, MIT - PetaBricks: A Language and Compiler based on Autotuning - [video recording of this Keynote Speech]
10:15 - 10:45Coffee Break
10:45 - 12:45

Session IV: Optimization for multi-cores; Parallelization & Runtime Systems - Marc Duranton, Chair

  • Automated Empirical Tuning of Scientific Codes For Performance and Power Consumption
    Shah Mohammad Faizur Rahman, Jichi Guo, Qing Yi (University of Texas at San Antonio)
  • A Workload-Aware Mapping Approach For Data-Parallel Programs
    Dominik Grewe, Zheng Wang, Michael O'Boyle (University of Edinburgh)
  • Runtime Parallelization of Legacy Code on a Transactional Memory System
    Matthew DeVuyst, Dean Tullsen (UCSD), Seon Kim (Korea University)
  • Cost-Aware Function Migration in Heterogeneous Systems
    Mario Kicherer, Rainer Buchty, Wolfgang Karl (Karlsruhe Institute for Technology)
12:45 - 14:00Lunch
14:00Buses from FORTH building to Knossos Archaeological Site (14:30)
14:30 - 16:30Guided tour of the Knossos Archaeological Site (buses, then, continue to Zacharioudakis Winery)
17:00 - 19:00Visit of Zacharioudakis Winery
19:00Banquet & Best Paper Award (at Zacharioudakis Winery)
[After the Banquet, buses return participants to Heraklion Center and to Galaxy Hotel]
 

Wednesday, 26 January 2011 - Conference (at FORTH building, G.Lianis Amphitheater)

08:30 sharpConference buses depart from (1) Heraklion Center and (2) Galaxy Hotel, as described in the Local Info page, towards FORTH building
09:00 - 10:30

Session V: Modeling and Analysis - Koen De Bosschere, Chair

  • Fast Modeling of Shared Caches in Multicore Systems
    David Eklov, David Black-Schaffer, Erik Hagersten (Uppsala University)
  • SWEEP: Evaluating Computer System Energy Efficiency using Synthetic Workload
    Kristof Du Bois, Tim Schaeps, Stijn Polfliet, Frederick Ryckbosch, Lieven Eeckhout (Ghent University)
  • Directly Characterizing Cross Core Interference Through Contention Synthesis
    Jason Mars, Lingjia Tang, Mary Lou Soffa (University of Virginia)
10:30 - 11:00Coffee Break

11:00 - 12:30

Session VI: Memory Hierarchies - Dimitris Nikolopoulos, Chair

  • Cache Equalizer: A Placement Mechanism for Chip Multiprocessor Distributed Shared Caches
    Mohammad Hammoud, Sangyeun Cho, Rami Melhem (University of Pittsburgh)
  • Replacement policies for shared caches on symmetric multicores: a programmer-centric point of view
    Pierre Michaud (INRIA)
  • NoC-Aware Cache Design for Multithreaded Execution on Tiled Chip Multiprocessors
    Ahmed Abousamra, Rami Melhem, Alex Jones (University of Pittsburgh)

12:30 - 12:40

Closing remarks

12:40 - 14:00

Lunch

14:00

Buses return from FORTH building to Heraklion (14:30)

 

[Click here to download the program in Pdf]