HiPEAC Paper Award
The HiPEAC Paper Award aims to encourage HiPEAC members to publish their work at conferences in which Europe is not strongly represented.
The award consists of a certificate and a financial award of € 1000.
The award is given to a HiPEAC member who presents a full paper in one of the following list of conferences (decision of the HiPEAC Steering Committee):
- Symposium on Principles of Programming Languages (POPL)
- Conference on Programming Language Design and Implementation (PLDI)
- Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS)
- International Symposium on Computer Architecture (ISCA)
- International Symposium on High Performance Computer Architecture (HPCA)
- Symposium on Field-Programmable Custom Computing Machines (FCCM)
- Design Automation Conference (DAC)
- Symposium on Microarchitecture (MICRO)
- Only HiPEAC members are entitled to get an award
- All authors get a HiPEAC award certificate
- A HiPEAC member can receive a financial award only once
- The work needs to have been done in Europe
- If a paper is co-authored by two or more HiPEAC members who never got a financial award before, they have to decide whom will receive the award (only one award per paper)
- Members can decide not to accept the financial award
2008
| Paper title | Authors | Conference |
|---|---|---|
| Iterative Optimization in the Polyhedral Model: Part II, Multidimensional Time | Louis-Noel Pouchet, Cedric Bastoul, John Cavazos and Albert Cohen | Programming Language Design and Implementation 2008 |
| Dispersing proprietary applications as benchmarks through code mutation | Luk Van Ertvelde and Lieven Eeckhout | Architectural Support for Programming Languages and Operating Systems |
| A Two-Level Load/Store Queue based on Execution Locality | Miquel Pericàs, Adrian Cristal, Francisco J. Cazorla, Ruben González, Alex Veidenbaum, Daniel A. Jiménez and Mateo Valero | International Symposium on Computer Architecture 2008 |
| Software-Controlled Priority Characterization of POWER5 Processor | Carlos Boneti, Francisco J. Cazorla, Roberto Gioiosa, Alper Buyuktosunoglu, Chen-Yong Cher and Mateo Valero | International Symposium on Computer Architecture 2008 |
| Runahead Threads to Improve SMT Performance | Tanausu Ramirez, Alex Pajuelo, Oliverio J. Santana and Mateo Valero | High-Performance Computer Architecture 2008 |
| An OS-Based Alternative to Full Hardware Coherence on Tiled CMPs | Christian Fensch and Marcelo Cintra | High-Performance Computer Architecture 2008 |
| Power and Branch Aware Word-Length Optimization | William Osborne, Jose Coutinho, Wayne Luk and Oskar Mencer | Field-Programmable Custom Computing Machines 2008 |
| Credit Risk Modelling using Hardware Accelerated Monte-Carlo Simulation | David Barrie Thomas and Wayne Luk | Field-Programmable Custom Computing Machines 2008 |
| Automated Hardware-Independent Scenario Identification | Juan Hamers and Lieven Eeckhout | Design Automation Conference 2008 |
| MAPS: An Integrated Framework for MPSoC Application Parallelization | Jianjiang Ceng, Jeronimo Castrillon, Weihua Sheng, Hanno Scharwächter, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tsuyoshi Isshiki and Hiroaki Kunieda | Design Automation Conference 2008 |
| ADAM: Run-time Agent-based Distributed Application Mapping for On-chip Communication | Mohammad A. Al Faruque, Rudolf Krist and Jörg Henkel | Design Automation Conference 2008 |
| Run-time Instruction Set Selection in a Transmutable Embedded Processor | Lars Bauer, Muhammad Shafique and Jörg Henkel | Design Automation Conference 2008 |
| Multiprocessor Performance Estimation Using Hybrid Simulation | Lei Gao, Kingshuk Karuri, Stefan Kraemer, Rainer Leupers, Gerd Ascheid and Heinrich Meyr | Design Automation Conference 2008 |
| Efficient unicast and multicast support for CMPs | Samuel Rodrigo, José Flich, José Duato, Mark Hummel | Symposium on Microarchitecture 2008 |
| A Distributed Processor State Management/Architecture for Large-Window Processors | Isidro González, Marco Galluzzi, Alex Veidenbaum, Marco Antonio Ramírez, Adrián Cristal, Mateo Valero | Symposium on Microarchitecture 2008 |
2009
| Paper title | Authors | Conference |
|---|---|---|
| Towards a Holistic Approach to Auto-Parallelization: Integrating Profile-Driven Parallelism Detection and Machine-Learning Based Mapping | Georgios Tournavitis, Zheng Wang, Björn Franke, Michael O'Boyle | Programming Language Design and Implementation 2009 |
| Per-Thread Cycle Accounting in SMT Processors | Stijn Eyerman, Lieven Eeckhout | Architectural Support for Programming Languages and Operating Systems |
| Producing Wrong Data Without Doing Anything Obviously Wrong! | Todd Mytkowicz, Amer Diwan, Univ. of Colorado, USA, Matthias Hauswirth, Univ. of Lugano, Switzerland, Peter Sweeney, IBM Research, USA | Architectural Support for Programming Languages and Operating Systems |
| Hardware Support for WCET Analysis of Hard Real-Time Multicore Systems | Marco Paolieri, Eduardo Quiñones, Francisco J Cazorla, Guillem Bernat, Mateo Valero | International Symposium on Computer Architecture 2009 |
| Stream Chaining: Exploiting Multiple Levels of Correlation in Data Prefetching | Pedro Diaz, Marcelo Cintra | International Symposium on Computer Architecture 2009 |
| Reconciling specialization and flexibility through compound circuits | Sami Yehia, Sylvain Girbal, Hugues Berry, Olivier Temam | International Symposium on High-Performance Computer Architecture 2009 |
| MRR: Enabling Fully Adaptive Multicast Routing for CMP Interconnection Networks | Pablo Abad Fidalgo, Valentin Puente Varona and Jose Angel Gregorio Monasterio | International Symposium on High-Performance Computer Architecture 2009 |
| Accelerating Quadrature Methods for Option Valuation | Anson H.T. Tse, David B. Thomas, Wayne Luk | Field-Programmable Custom Computing Machines |
| FPGA Accelerated Simulation of Biologically Plausible Spiking Neural Networks | David B. Thomas, Wayne Luk | Field-Programmable Custom Computing Machines |
| Benchmarking Reconfigurable Architectures in the Mobile Domain | Peter Jamieson, Tobias Becker, Wayne Luk, Tero Rissa, Teemu Pitkanen, Peter Y.K. Cheung | Field-Programmable Custom Computing Machines |
| Compact and Flexible Microcoded Elliptic Curve Processor for Reconfigurable Devices | Samuel Antao, Ricardo Chaves, Leonel Sousa | Field-Programmable Custom Computing Machines |
| FPGA Implementation of a Single-Precision Floating-Point Multiply-Accumulator with Single-Cycle Accumulation | Arun Paidimarri, Alessandro Cevrero, Philip Brisk, Paolo Ienne | Field-Programmable Custom Computing Machines |
| IMORC: Application Mapping, Monitoring and Optimization for High-Performance Reconfigurable Computing | Tobias Schumacher, Christian Plessl, Marco Platzner | Field-Programmable Custom Computing Machines |
| Way Stealing: Cache-Assisted Automatic Instruction Set Extensions | Theo Kluter, Philip Brisk, Paolo Ienne, Edoardo Charbon | Design and Automation Conference |
| Designing Heterogeneous ECU Networks via Compact Architecture Encoding and Hybrid Timing Analysis | Michael Glaβ, Martin Lukasiewycz, Jürgen Teich, Unmesh D. Bordoloi, Samarjit Chakraborty | Design and Automation Conference |
| NOC Topology Synthesis for Supporting Shutdown of Voltage Islands in SOCs | Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni Di Micheli | Design and Automation Conference |
| Dynamic Thread and Data Mapping for NOC Based CMPs | Mahmut Kandemir, Sai Prasanth Muralidhara, Ozcan Ozturk | Design and Automation Conference |
| Portable Compiler Optimization Across Embedded Programs and Microarchitectures using Machine Learning | Christophe Dubach, Timothy M. Jones, Edwin V. Bonilla, Grigori Fursin, Michael F.P. O'Boyle | 42nd International Conference on Microarchitecture |
| EazyHTM: Eager-Lazy Hardware Transactional Memory | Saša Tomic, Cristian Perfumo, Chinmay Kulkarni, Adrià Armejach, Adrián Cristal, Osman Unsal, Tim Harris, Mateo Valero | 42nd International Conference on Microarchitecture |
| An Hybrid eDRAM/SRAM Macrocell to Implement First-level Data Caches | Alejandro Valero, Julio Sahuquillo, Salvador Petit, Vicente Lorente, Ramón Canal, Pedro López, José Duato | 42nd International Conference on Microarchitecture |
| Multiple Clock and Voltage Domains for Chip Multi Processors | Efraim Rotem, Ran Ginosar, Avi Mendelson, Uri Weiser | 42nd International Conference on Microarchitecture |
| Optimizing Shared Cache Behavior of Chip Multiprocessors | Mahmut Kandemir, Sai Prasanth Muralidhara, Sri Hari Krishna Narayanan, Yuanrui Zhang, Ozcan Ozturk | 42nd International Conference on Microarchitecture |
| Adaptive line placement with the set balancing cache | Dyer Rolán, Basilio B. Fraguela and Ramón Doallo | 42nd International Conference on Microarchitecture |
| Characterizing the resource-sharing levels in the UltraSPARC T2 Processor | Vladimir Cakarevic, Petar Radojkovic, Javier Verdu, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky and Mateo Valero | 42nd International Conference on Microarchitecture |