Programming models and operating systems

Research challenge:

Despite all the experience on parallel programming gathered in the last decades and the experience in implementing runtime systems to support parallel execution, the productive expression and efficient exploitation of parallelism for current multicore architectures are not obvious tasks.

Many-/multi-core architectures currently include tenths of cores and will include hundreds of them in the near future, with memory organizations that will probably scape from the easy-to-program shared-memory address space. In addition, resource specialization is considered as the path to built power efficient architectures, leading to heterogeneous architectures. New programming paradigms and OS/hardware support to enable effective programming of these architetures with 100+ cores, in terms of scalability and portability, are necessary.

Objectives:

The main objective of this cluster is to create a powerful european research community for programming models and runtime environment for exascale architectures based on future many-/multi-core architectures. To achieve this we want to:

• Propose novel programming models (or evolutions of the current ones) for future homogeneous/heterogeneous many-/multi-core architectures. Expressiveness and productivity are equally important. Accelerators (SIMD units, GPUs, FPGAs, ...) should be considered. Research on compiler and runtime support to parallel programming models, hiding as much as possible the particularities of the target architecture to the programmer. The inter-operability of standards (OpenMP and OpenCL) will provide productivity and portability.
• Propose or extend programming models for architectures with multiple nodes that consider programming productivity as a target. We plan to investigate the addition of asynchrony in PGAS (partitioned global address space) languages (such as UPC).
• Explore and propose new architectural features to support the programming model and its runtime implementation: thread creation, task off-loading, transactional memory.
• Evaluate and propose OS support for architectures including heterogeneous cores (CPU, SIMD, GPU), reconfigurable cores (FPGA), ... that guarantees fast task creation and synchronization in the many-/multi-core environment, provides efficient task scheduling and allocation mechanism, thread management for power, temperature, and reliability, provides QoS in real time systems, ...
• Promote the use and development of common tools to support our research activities as well as new benchmarks and methodologies that could serve as a basis for the evaluation of ideas proposed in our community.
• Form interdisciplinary (intra- and inter-cluster) research groups that could make project proposals on programmability and parallelism of homogeneous or heterogeneous multi-core and/or reconfigurable architectures, with a holistic approach that addresses issues related to the underlying hardware, the operating system and the system software.
• Contribute to a common HiPEAC 2012-2020 vision.

Current activities:

Some of the joint research activities originated from the interaction within the cluster are:

• Exploration and evaluation of currently available programming models for Cell, proposing extensions that increase their efficiency, portability and programming productivity. Groups involved: FORTH, BSC-UPC.
• Explore and propose novel paradigms based on the exploitation of parallelism at runtime, supported with program annotations. Eg. StarSs (BSC-UPC), TFlux (U. Cyprus), FLAME (U. Castellon). In this direction, a paper containing a proposal to extend OpenMP to support the specification of task off-loading on accelerators has been accepted at IWOMP 2009 (A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures).
• Implementation of GPUSs, a version of StarSs targetting GPU-based systems. Groups involved: U. Castellon, BSC-UPC. This collaboration has already resulted in a paper accepted for publication at Europar 2009 (An Extension of the StarSs Programming Model for Platforms with Multiple GPUs).
• Explore the use of FPGA-based accelerators to off-load tasks in OpenMP. This work is done in collaboration with the Reconfigurable Computing cluster and has resulted in a first paper accepted for publication at SAMOS 2009 (OpenMP extensions for FPGA Accelerators).
• Promotion of common research activities around transactional memory, including language support, libraries and hardware support. Groups involved: U. Manchester, BSC-CNS.
• Promotion of common tools to support our research activities. A new PRO seminar has been started in this direction. Up to now a one-day seminar on the Mercurium source-to-source restructurer has been done and is available for dowload and view.
• Collaborations inside current FP6 (SARC, Acotes) and FP7 (Velox and Merasa) projects.

PRO seminars

The cluster has recently stated a series of seminars with tutorials of the programming models and tools that members can offer to the cluster community. Up to now, only one seminar has been organized:

• Mercurium seminar (March 2009, BSC-UPC)

To access the contents of the PRO seminar, please visit our seminars page.

Other activities:

• Organization of workshops on programming models and runtime support for multi-cores systems:
• MULTIPROG-2008 in Goteborg (January 2008)
• BMW'08 in Barcelona (June 2008)
• MULTIPROG-2009 in Paphos (January 2009)

Information about cluster meetings

• Information about the kick-off meeting in Goteborg. January 2008.
• Information about the 2nd meeting in Barcelona. June 2008.
• Information about the 3rd meeting in Paris. November 2008.
• Information about the 4th meeting in Paphos. January 2009.

Coordinating partner: BSC