Research challenge:

Electronic design automation (EDA) methodology and tools are key enablers for many HiPEAC research activities, such as multi-core and NoC architectures, or reconfigurable systems. In the light of moving towards 65nm and 45nm CMOS technologies, and thus the urgent need for higher design productivity, EDA is currently aiming at a new abstraction level: Electronic System Level (ESL). ESL focuses on system design aspects “beyond RTL”, e.g. efficient HW/SW modelling and partitioning, mapping applications to MPSoC architectures, ASIP design, etc. These and other research topics will be addressed in the “Design methodology and tools” cluster. While ESL is currently mostly driven by the embedded system design community, due to the need to design efficient application specific systems with very limited resources (and thus with a higher acceptance of automation and tools), it can strongly benefit from many recent developments in the high-performance community (such as fast simulation, efficient compilation etc.), and vice versa. Therefore, another important goal of this cluster will be to establish a closer link between these communities. Besides the regular cluster meetings, this can be implemented e.g. by coupling of existing platforms and tools, so as to achieve new heights in design productivity.

Initial research topics:

• ESL-centric research activities, e.g.
  
  • Application specific processor (ASIP) design;
  • Custom instruction set extensions; Automated retargeting of software tools;
  • MPSoC modelling, virtual platforms, HW/SW partitioning, and design space exploration;
  • Early software performance estimation;
  • Sequential-to-parallel code generation for MPSoC.
• Focus on power and cost sensitive application domains (e.g. mobile terminals, multimedia, SDR) and heterogeneous MPSoC architectures.

Planned activities:

• Serve other HiPEAC clusters (e.g. multi-core architectures, compilation, reconfigurable) with required ESL tool chain.
• Specify, establish, and promote common “HiPEAC design flow”.
• Connect academic tools (e.g. UNISIM, gcc, Diablo) with industrial tools (e.g. CoSy, LISATek, Virtual Platforms) and design flows.
• Organize courses on specific design tools and methodology for HiPEAC members and related communities.
• Strengthen links between embedded and high-performance research communities via joint papers and workshops on special topics.

Coordinating partner: RWTH Aachen